Resin for semiconductor wire

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With textured surface

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S773000

Reexamination Certificate

active

06700198

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a carrier substrate for producing a semiconductor device, a production process of the carrier substrate, a semiconductor device, and a production process of the semiconductor device. More particularly, this invention relates to a carrier substrate for producing appropriately a resin mold, to a lead-less surface package type semiconductor device, to a production process of the carrier substrate, to a semiconductor device, and to a production process of the semiconductor device.
2. Description of the Related Art
As the size of electronic appliances has been reduced and their integration density has become higher, in the field of semiconductor devices, the demand for the miniaturization of semiconductor chips per se and the reduction of a pitch of external connection terminals has become stronger so as to reduce the size of semiconductor devices and to increase their integration density.
As a structure for accomplishing a reduction in size of a resin mold type semiconductor device, Japanese Unexamined Patent Publication (Kokai) No. 9-162348 proposes a package structure of a lead-less surface package type.
As shown in FIG.
2
(
d
) of the accompanying drawings, a semiconductor device utilizing this package structure includes a semiconductor chip
20
, a resin package
22
for sealing the semiconductor chip
20
, a resin protuberance
24
formed on the surface of the resin package
22
connected to a mother board in such a manner as to protrude from this surface, a plated film
14
applied to the outer surface of the resin protuberance
24
and a wire
30
for electrically connecting each electrode
28
of the semiconductor chip
20
to the plated film
14
.
This semiconductor device is produced by utilizing a carrier substrate
50
for producing a semiconductor device, which substrate
50
includes a sheet-like metal substrate
12
which supports the plated film
14
and onto which the semiconductor chip
20
is mounted, as shown in FIG.
1
(
d
).
First, a production process of the carrier substrate
50
will be explained with reference to FIGS.
1
(
a
) to
1
(
d
).
A resist
39
is first applied to both surfaces of the metal substrate
12
. The resist on one surface
12
a
of the metal substrate
12
is then removed in the portion that corresponds to the resin protuberance
24
to form a resist pattern (FIG.
1
(
a
)).
Next, the metal substrate
12
having the resist pattern formed thereon is immersed in an etchant solution, and etching is conducted until the portion of the metal substrate
12
that corresponds to the resin protuberance
24
is half-etched to form a recess
16
(FIG.
1
(
b
)).
The resist pattern is left as such, and plating is applied so as to form the plated film
14
inside the recess
16
(FIG.
1
(
c
)).
The resist is exfoliated to complete the carrier substrate
50
(FIG.
1
(
d
)).
Next, a process of producing a semiconductor device utilizing the carrier substrate
50
so formed will be explained with reference to FIGS.
2
(
a
) to
2
(
d
).
The semiconductor chip
20
is fixed by applying an adhesive, for example, to one of the surfaces
12
a
of the carrier substrate
50
described above (FIG.
2
(
a
)).
Each electrode
28
disposed on the semiconductor chip
20
and the plated film
14
formed on the metal substrate
12
of the carrier substrate
50
are electrically connected by a wire
30
through wire bonding (FIG.
2
(
b
)).
A resin package
22
is formed by resin molding on the carrier substrate
50
in order to seal the semiconductor chip
20
and the connection portions by the wires
30
with resin (FIG.
2
(
c
)).
The metal substrate
12
is removed by etching in such a fashion as to leave the plated film
14
of the carrier substrate
50
(FIG.
2
(
d
)). In consequence, the plated film
14
is exposed to the outside of the package and functions as a connection surface of external connection terminals, and a semiconductor device having a structure capable of being connected to the mother board is completed. Incidentally, copper (Cu), for example, is used as the material of the metal substrate
12
so that etching can be conducted satisfactorily.
In the structure of the carrier substrate
50
according to the prior art described above, however, the plated film
14
that constitutes the external connection terminal adheres only to the resin that flows into the recess
16
along the shape of the recess
16
having a semi-spherical sectional shape. Therefore, adhering power is small, and the plated film
14
is likely to exfoliate from the surface of the resin protuberance
24
and invites the drop of reliability of the product.
Therefore, the problem that the reliability of the external connection terminal connected to the mother board of the semiconductor device cannot be improved remains unsolved.
SUMMARY OF THE INVENTION
It is therefore the object of the present invention to provide a carrier substrate that improves adhesion between a plated film that functions as an external connection terminal and the surface of a resin protuberance in a semiconductor device of a resin mold, lead-less surface package type and can improve reliability, a production process of the carrier substrate, a semiconductor device, and a production process of the semiconductor device.
To accomplish the object described above, the present invention provides a carrier substrate for use in the production of a semiconductor device including a semiconductor chip, a resin package sealing the semiconductor chip, a resin protuberance disposed on the surface of the resin package connected to a mother board, a plated film covering the surface of the resin protuberance and a wire electrically connecting an electrode of the semiconductor chip to the plated film, wherein the carrier substrate comprises a sheet-like metal substrate dissolvable by an etchant solution not dissolving the plated film, and suitable for fixing the semiconductor chip; a recess disposed at a position of the metal substrate corresponding to the resin protuberance, and having a bottom surface and/or side surface that are/is rugged; and a plated film covering continuously the bottom surface and the side surface of the recess, and having a surface shape corresponding to the surface shapes of the bottom surface and the side surface.
The present invention provides also a process of producing a carrier substrate for use in the production of a semiconductor device including a semiconductor chip, a resin package sealing the semiconductor chip, a resin protuberance disposed on the surface of the resin package connected to a mother board, a plated film covering the surface of the resin protuberance and a wire electrically connecting an electrode of the semiconductor chip to the plated film; the carrier substrate including a sheet-like metal substrate dissolvable by an etchant solution not dissolving the plated film, and suitable for fixing the semiconductor chip; a recess disposed at a position of the metal substrate corresponding to the resin protuberance, and having a bottom surface and/or side surface that are/is rugged; and a plated film for continuously covering the bottom surface and the side surface of the recess, and having a surface shape corresponding to surface shapes of the bottom surface and the side surface, the process comprising the steps of: forming the etching resist layer on both surfaces of the metal substrate; patterning the etching resist layer on one of the surfaces of the metal substrate to form a resist pattern having an opening at a position corresponding to the resin protuberance and a part of the etching resist layer remaining in an island-like shape inside the opening; etching the metal substrate, causing etching to proceed non-uniformly inside the opening due to the presence of the island-like etching resist layer, and thereby forming a recess having a side surface and a rugged bottom surface at the position of the opening of the resist pattern; and forming a plated film covering continuously the side surface

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Resin for semiconductor wire does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Resin for semiconductor wire, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Resin for semiconductor wire will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3249803

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.