Resilient storage system

Details Resilient storage system Resilient storage system

1992-11-13

1995-10-31

Baker, Stephen M.

Excavating

371 403, G06F 1110

Patent

active

054636442

ABSTRACT:
A memory system providing capability for correction of multiple bit errors. The storage elements of the memory system are divided into four-bit nibbles, wherein storage of a single 32-word requires access to eight separate storage elements. A ninth storage element stores a four-bit error syndrome. All nine storage elements have single bit error correction/multiple bit error detection. All single bit errors are corrected directly within the individual storage element. Multiple bit errors within a single storage element are signaled to the interface controller which corrects the error using the stored four-bit error syndrome.

REFERENCES:
patent: 4775978 (1988-10-01), Hartness
patent: 4809278 (1989-02-01), Kim et al.
patent: 4989210 (1991-01-01), Scheuneman et al.
patent: 5058115 (1991-10-01), Blake et al.

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