Resettable clamp-sample-and-hold signal processing circuit for i

Details Resettable clamp-sample-and-hold signal processing circuit for i Resettable clamp-sample-and-hold signal processing circuit for i

1991-10-15

1994-09-20

Kostak, Victor R.

Television

Camera, system and detail

Combined image signal generator and general image signal...

348241, H04N 314

Patent

active

053493800

ABSTRACT:
A resettable clamp-sample-and-hold (RC-S/H) circuit includes a preamplifier 12 which buffers and scales a video imaging signal for an RC filter 17. Charge accumulated on the capacitor 16 of the RC filter 17 from previously recovered pixel voltage levels may be removed through a reset switch 18. The scaled video imaging signal may then propagate through a filter buffer 20, a clamp buffer 26 and a sample/hold buffer without the adverse effect of sequential pixel crosstalk.

REFERENCES:
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patent: 4004157 (1977-01-01), Baertsch et al.
patent: 4289975 (1981-09-01), Rolfe
patent: 4551761 (1985-11-01), Sase et al.
patent: 4562475 (1985-12-01), Levine
patent: 4617593 (1986-10-01), Dudley
patent: 4637036 (1987-01-01), Kobari
patent: 4805025 (1989-02-01), Akiyama et al.
patent: 4809074 (1989-02-01), Imaide et al.
patent: 5144444 (1992-09-01), MacLean

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