Reset signal output circuit and semiconductor integrated circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Plural non-isolated transistor structures in same structure

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Details

257575, 326124, H01L 27082, H01L 27102, H01L 2970, H01L 3111

Patent

active

056939787

ABSTRACT:
A logic circuit (3) comprises IIL aggregates (4a, 4b, 4c) each consisting of a plurality of IIL elements. Each of the IIL aggregates (4a, 4b, 4c) is supplied with an injector current (I.sub.inj) from an injector current source (2) through a wiring (5). A monitoring element (6) is formed by utilizing an IIL element which needs the longest time until the injector current therein attains a predetermined value. When the injector current applied to an injector current input end (9) attains the predetermined value, potentials of an output terminal (10) and a reset signal input terminal (7) fall. Therefore, a reset operation is performed in accordance with the IIL element which needs the longest time until the injector current attains the predetermined value.

REFERENCES:
patent: 3961351 (1976-06-01), Blatt
patent: 3986199 (1976-10-01), Williams
patent: 4144098 (1979-03-01), Roesner
patent: 4160173 (1979-07-01), Aoki
patent: 4225854 (1980-09-01), Davis et al.
patent: 4841484 (1989-06-01), Watanabe et al.

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