Reset signal generating circuit

Details Reset signal generating circuit Reset signal generating circuit

2009-07-08

2010-11-02

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S077000, C327S081000

Reexamination Certificate

active

07825705

ABSTRACT:
A reset signal generating circuit outputs a reset signal having a sufficient pulse width even when the power supply voltage is fluctuated. A node B reaches a high level during a power-on reset and is at a low level during operation. When a power supply (Vcc) fluctuates during operation and as soon as a node C reaches a high level, a switch element MN50turns on, the node B is decreased to a low level, and a stable low-level reset signal RST1is outputted. When the node B reaches a low level, a switch element MN51turns off with a delay and capacitors104and105are gradually charged by a charging circuit112. When the potential at the node B exceeds a threshold level of an inverter circuit106, the reset signal RST1is brought back to a high level, the reset is cancelled, the switch element MN50is turned off, and the switch element MN51is brought to be in an on-state again (FIG.1).

REFERENCES:
patent: 6972602 (2005-12-01), Akamatsu et al.
patent: 7696795 (2010-04-01), Choi
patent: 2003/0201807 (2003-10-01), Ohbayashi et al.
patent: 2001-285046 (2001-10-01), None

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