Reset signal distribution

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S142000, C327S291000, C327S293000, C326S093000

Reexamination Certificate

active

08072250

ABSTRACT:
Methods, circuits and systems may operate to generate a reset signal at an input reset block and synchronously distribute the reset signal, via a number of pipelined reset blocks, to multiple ports of a core circuit. The reset signal may be transmitted successively to each of the pipelined reset blocks to provide delayed reset signals having delay times. The delay times may be based on locations of the pipelined reset blocks in the reset circuit. On or more of the delayed reset signals may be programmably coupled to one or more ports of the core circuit. Additional methods, circuits, and systems are disclosed.

REFERENCES:
patent: 6856171 (2005-02-01), Zhang
patent: 2009/0027085 (2009-01-01), Ishii et al.

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