Reset scheme for I/O pads in a source synchronous system

Details Reset scheme for I/O pads in a source synchronous system Reset scheme for I/O pads in a source synchronous system

2007-12-25

2007-12-25

Tran, Khanh (Department: 2611)

Pulse or digital communications

Transceivers

Transmission interface between two stations or terminals

Reexamination Certificate

active

10622672

ABSTRACT:
A system and method for providing reset control between two integrated circuit domains (ICDs) disposed in a synchronous relationship. Upon reset, control signals are generated in a first ICD for resetting driver/receiver circuitry therein in a phased manner. An inter-ICD reset control signal is generated by the first ICD for transmission to the second ICD, wherein the inter-ICD reset control signal is operable to reset the second ICD's driver/receiver circuitry and other components therein.

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Affidavit of Richard W. Adkisson, Feb. 17, 2005, 4 pages.

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