Reset monitor

Details Reset monitor Reset monitor

1991-07-16

1992-11-17

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072964, 3072965, 307592, H03K 301, H03K 500

Patent

active

051646137

ABSTRACT:
Reset monitor for detection of power failure and external reset for devices such as microprocessors with the reset monitor providing a single settling time hold down of a reset signal. Preferred embodiments include bandgap reference with high current side compensating resistor, bond out options for analog parameter selection, glitch free state machine control of both detections, and external pushbutton debouncing both depression and release.

REFERENCES:
patent: 4296338 (1981-10-01), Thomas
patent: 4367422 (1983-01-01), Leslie
patent: 4433390 (1984-02-01), Carp et al.
patent: 4473759 (1984-09-01), Mahabadi
patent: 4523104 (1985-06-01), Norris et al.
patent: 4882506 (1989-11-01), Johansson et al.
patent: 4902910 (1990-02-01), Hsieh
patent: 4945300 (1990-07-01), Sato et al.
Variable Threshold Method for Elimination of Key Bounce; D. E. Fisher and P. Pleshko; IBM Tech. Disc. Bull; Apr. 1971.

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