Reset method of non-volatile memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185270, C365S185280

Reexamination Certificate

active

07554851

ABSTRACT:
A reset method of a non-volatile memory is described. The non-volatile memory includes a plurality of cells on a substrate of a first conductivity type, each including a portion of the substrate, a control gate, a charge-storing layer between the portion of the substrate and the control gate, and two S/D regions of a second conductivity type in the portion of the substrate. The reset method utilizes a DSB-BTBTHH effect. A first voltage is applied to the substrate and a second voltage to both S/D regions of each cell, wherein the difference between the first and second voltages is sufficient to cause band-to-band tunneling hot holes. A voltage applied to the control gate and the period of applying the voltages are controlled such that the threshold voltages of all the cells converge in a tolerable range.

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