Reset circuit for MOS imager array

Details Reset circuit for MOS imager array Reset circuit for MOS imager array

1985-03-15

1986-10-28

Rubinson, Gene Z.

Facsimile and static presentation processing

Facsimile

Recording apparatus

H04N 314

Patent

active

046202323

ABSTRACT:
A reset circuit for a MOS imager array in which a reset gate that normally has its source grounded and its gate controlled by a column signal, in order to pass a row signal to a row of imaging elements, has a high chip reset signal applied to its drain. A high chip reset signal is then passed to the row irrespective of the row signal. As a result, the imaging elements are reset on all the rows simultaneously without the need of cycling the row signal.

REFERENCES:
patent: 4335405 (1982-06-01), Sakane et al.
patent: 4496980 (1985-01-01), Pfleiderer et al.
patent: 4531156 (1985-07-01), Nishizawa et al.
patent: 4547806 (1985-10-01), Herbst et al.

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