Reset circuit for electrically isolated circuits communicating v

Details Reset circuit for electrically isolated circuits communicating v Reset circuit for electrically isolated circuits communicating v

1987-10-19

1989-08-22

Fleming, Michael R.

Excavating

371 62, G06F 1116

Patent

active

048602892

ABSTRACT:
A simplified master controller or outguard circuit monitors and controls a plurality of separate slave, or inguard, circuits. Only a single watchdog circuit is provided on the outguard arrangement, with simplified timers being provided on each inguard arrangement to generate a direct hardware reset signal for local microprocessors in the inguard circuits using existing serial communication lines. A break signal generated by the watchdog in the outguard circuit is detected and, without interpretation, converted to the reset signal for the inguard circuit in synchronism with operation of the outguard circuit.

REFERENCES:
patent: 4553204 (1985-11-01), Hashimoto
patent: 4567560 (1986-01-01), Polis
patent: 4586179 (1986-04-01), Sizazi
patent: 4618953 (1986-10-01), Daniels
patent: 4627060 (1986-12-01), Huang
patent: 4629907 (1986-12-01), Kosak
patent: 4670676 (1987-06-01), Nishitani
patent: 4696002 (1987-09-01), Schleupen
patent: 4752930 (1988-06-01), Kitamura
patent: 4775957 (1988-10-01), Yakuwa

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