Patent
1994-10-18
1996-09-10
Ellis, Richard L.
G06F 938
Patent
active
055553842
ABSTRACT:
Methods and apparatus for optimizing the operation of an instruction pipeline in a computer are disclosed. The methods and apparatus function at both the effective beginning and end of the pipeline. At the pipeline's beginning, a Pipeline Controller monitors the availability of data for various floating point operations. Data is read at either a fast or slow rate, depending on its availability, and instructions are allowed to proceed through the pipeline based on this data availability. At the effective end of the pipeline, the Controller monitors all instructions in the pipeline, notes all potential resource conflicts, and resolves these potential conflicts by either the insertion of an appropriate number of HOLD states or the conclusion that no actual resource competition exists.
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Parry David M.
Roberts David B.
Taylor George S.
Ellis Richard L.
Silicon Graphics Inc.
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