Dynamic information storage or retrieval – Binary pulse train information signal – Including sampling or a/d converting
Reexamination Certificate
2007-05-08
2007-05-08
Wellington, Andrea (Department: 2627)
Dynamic information storage or retrieval
Binary pulse train information signal
Including sampling or a/d converting
C369S059220, C369S059160
Reexamination Certificate
active
10704691
ABSTRACT:
An analog filter is placed at a stage previous to an analog-digital converter (ADC), and a waveform equalizer is placed at a stage subsequent to the ADC. The sampling frequency of the ADC is determined by a clock generation section according to the relationship between the bit rate of an input reproduction signal and the characteristic of the analog filter. The number of taps is changed according to the relationship between the bit rate of the input reproduction signal and the characteristic of the analog filter. Further, the tap coefficients of a waveform equalizer are changed according to the height of the frequency band of the input reproduction signal. A waveform evaluation section generates a signal that evaluates a waveform equalization signal transmitted from the waveform equalizer to a Viterbi decoder, whereby adaptive waveform equalization is realized.
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Japanese Office Action issued in corresponding Japanese Patent Application No. JP 2003-359045, dated Nov. 7, 2006.
Morie Takashi
Nakahira Hiroyuki
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
Ortiz-Criado Jorge L.
Wellington Andrea
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