Dynamic information storage or retrieval – Control of storage or retrieval operation by a control... – Control of information signal processing channel
Reexamination Certificate
2000-06-19
2004-03-09
Tran, Thang V. (Department: 2653)
Dynamic information storage or retrieval
Control of storage or retrieval operation by a control...
Control of information signal processing channel
C369S053310, C369S059210
Reexamination Certificate
active
06704260
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a reproducing apparatus wherein data is read out from a recording medium driven at a variable driving speed and the data is memorized in a temporal memory means at a memory timing into the temporal memory generated at a predetermined cycle different from a reading timing so as to reproduce the data.
2. Description of the Related Art
According to a conventional technology, in order to prevent an interruption of reproduction of audio data due to an occurrence of discontinuity of reading, which is caused by an interruption of data reading from a recording medium because of vibration during reproduction of the audio data recorded in the recording medium, for example, a spindle motor is rotated at a higher speed than a rotation speed necessary for ordinary reproduction of the audio data so as to process data from the recording medium read by an optical pickup by means of a signal processing portion and store the data temporarily in a buffer RAM through a RAM (random access memory) controller as audio data. Consequently, the microcomputer controls so as to read audio data continuously at a predetermined speed even if discontinuity of reading occurs.
If there is a jitter between a frame synchronous signal (SCOR signal) synchronous with a clock extracted from a RF signal reproduced from a disc and a frame synchronous signal (GRSCOR signal) synchronous with crystal system clock, the microcomputer generates a XQOK signal to the memory controller with reference to the GRSCOR signal and controls start and stop of data write into the buffer RAM.
As shown in
FIGS. 2A
,
2
D, the memory controller has to start control on writing into the buffer RAM with reference to a rear end of the GRSCOR signal. Thus, conventionally, a control signal for permitting data write into the buffer RAM is generated by means of a circuit shown in FIG.
1
.
As shown in
FIG. 1
, the microcomputer
12
generates a XQOK signal for detecting that the frame synchronous signal GRSCOR synchronous with the crystal system clock to be applied to the interruption signal input terminal becomes high level. The XQOK signal is logically inverted by a NOT circuit
7
a
and after that, inputted to an AND circuit
7
b
. The AND circuit
7
b
obtains a logical product between the GRSCOR signal and the XQOK signal and its result is inputted to a latch circuit
7
c
. Then, a logical product between the output of the latch circuit
7
c
and the GRSCOR signal is obtained by the AND circuit
7
d
and inputted to a timer circuit
7
e
as an AND output. A permission signal for permitting a memory write control block
7
f
to start its operation is outputted from the timer circuit
7
e
and based on this permission signal, the memory write control block
7
f
controls data write into the buffer RAM
8
. A permission signal outputted from the timer circuit
7
e
is inputted to a reset input terminal of the latch circuit
7
c
and the latch circuit
7
c
negates the output.
In this case, as indicated by a conventional timing chart of generation of data write timing into a buffer RAM shown in
FIGS. 2A
,
2
B,
2
C,
2
D, the microcomputer is made active low only in a period T
5
in such a period in which the GRSCOR signal is of high level and the microcomputer has to generate a permission signal (XQOK signal) for permitting data write into the RAM controller and send it to the RAM controller. Thus, the microcomputer is required to fetch the GRSCOR signal through an interruption processing by means of an interruption terminal and send the XQOK signal at the above described strict timing immediately.
FIG. 3
shows a conventional flow chart of a generation of data write timing into the buffer RAM. Referring to
FIG. 3
, when the SCOR signal is inputted in step S
11
, the processing proceeds to step S
12
in which data of the subcode Q is fetched from a signal processing portion. In step S
13
, the microcomputer checks continuity of address according to data of the fetched subcode Q. If the address is discontinuous, presence/absence of the SCOR signal is determined in step S
11
and after that, fetching of data of the subcode Q in step S
12
and checking of address continuity in step S
13
are repeated. If the address is continuous, the processing proceeds to step S
14
, in which whether or not an interruption processing has occurred is determined.
If the interruption processing occurs in step S
14
, the processing proceeds to step S
15
, in which whether or not the GRSCOR signal is high level is determined. If the GRSCOR signal is high level, the processing proceeds to step S
16
, in which the microcomputer sends a XQOK signal for permitting data write to the RAM controller. Generation timing of the XQOK signal is shown in
FIGS. 2A
,
2
B. If the GRSCOR signal is not high level in step S
15
, the processing proceeds to step S
17
, in which another interruption processing is carried out.
As described above, in a conventional technology for preventing an interruption of reproduction of audio data because of discontinuity of reading, which is caused by an interruption of data reading from a recording medium due to vibration applied to the apparatus, such a timing that the microcomputer is capable of sending the XQOK signal for permitting data write into the RAM controller is strictly restricted. Therefore, the microcomputer requires an interruption port for interruption processing and there is some limitation on its software which may affect other processings.
Accordingly, the present invention has been achieved in views of the above described problems, and therefore, an object of the invention is to provide a reproducing apparatus for preventing an interruption of reproduction of audio data, in which the microcomputer smoothes timing generation of a permission signal for permitting data write into a RAM controller.
SUMMARY OF THE INVENTION
To achieve the above object, according to an object of the present invention, there is provided a reproducing method in which data is read from a recording medium driven at a variable driving speed and stored in a temporal memory means for reproduction, comprising the steps of: detecting a readable signal indicating a timing capable of reading data from the recording medium generated from a signal reproduced from the recording medium; determining continuity of data read when the readable signal is detected; and outputting a permission signal for permitting the data to be written into the temporal memory means promptly if it is determined that the read data has continuity.
Further according to another aspect of the present invention, there is provided a reproducing apparatus for reading data from a recording medium driven at a variable driving speed and reproducing the data, comprising: a detecting means for detecting a readable signal indicating a timing capable of reading data from the recording medium generated from a signal reproduced from the recording medium; a determining means for determining continuity of data read when the readable signal is detected; and a temporal memory means for memorizing data read from the recording medium temporarily; and a permission signal output means for outputting a permission signal for permitting the data to be written into the temporal memory means promptly if it is determined that the read data has continuity.
REFERENCES:
patent: 5508983 (1996-04-01), Nakamura et al.
patent: 5590101 (1996-12-01), Itoi
patent: 5604646 (1997-02-01), Yamawaki
patent: 5694383 (1997-12-01), Arataki et al.
patent: 6496456 (2002-12-01), Ueki
patent: 6529456 (2003-03-01), Koudo et al.
Kabasawa Kenichi
Kitamura Atsushi
Yunoki Hirotomo
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Sony Corporation
Tran Thang V.
Vuong Bach
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