Representative majority voter for bus invert coding

Coded data generation or conversion – Digital code to digital code converters – Adaptive coding

Reexamination Certificate

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C341S050000

Reexamination Certificate

active

07397395

ABSTRACT:
In general, in one aspect, the disclosure describes an apparatus inluding a representative majority voter gate to analyze bit transitions of a pluraility of bits. The plurailuty of bits are analzed in groups. The representative majority voter gate generates an invert signal based on the analysis. The apparatus further inludes a conditional inverter to apply the invert signal to the pluraility of bits.

REFERENCES:
patent: 5923830 (1999-07-01), Fuchs et al.
patent: 7173947 (2007-02-01), Ramakrishnan et al.
patent: 2006/0033523 (2006-02-01), Erstad et al.
Stan, Mircea R., et al., “Bus-Invert Coding for Low-Power I/O”,IEEE Transactions on Very Large Scale Integration(VLSI)Systems, vol. 3, No. 1, Mar. 1995, 49-58.
Tschanz, James W., et al., “Majority Voter Apparatus, Systems and Methods”, U.S. Appl. No. 10/947,765, filed Sep. 23, 2004.

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