Replica DLL for phase resetting

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency or phase modulation

Reexamination Certificate

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Details

C455S265000

Reexamination Certificate

active

08036614

ABSTRACT:
A method, algorithm, architecture, circuits, and/or systems for using a delay-locked loop (DLL) for phase adjustment in a direct conversion radio receiver are disclosed. The DLL is configured to avoid a perceived phase shift when the control voltage to a delay line is reset upon reaching a predetermined amount. Embodiments disclosed include a DLL, a radio receiver using the DLL, a circuit for resetting the DLL, a method for recovering a modulated radio signal, and a method of synchronizing a reference clock to a radio signal. The approach can allow for improved synchronization of the reference clock to a received radio signal during baseband frequency recovery.

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patent: 7078949 (2006-07-01), Kim et al.
patent: 7285997 (2007-10-01), Haerle et al.
patent: 7308065 (2007-12-01), Donnelly et al.
patent: 7375564 (2008-05-01), Cho et al.
patent: 2006/0208780 (2006-09-01), Johnson
patent: 2007/0063748 (2007-03-01), Chung
patent: 2008/0157836 (2008-07-01), Cho
patent: 2003-244024 (2003-08-01), None
patent: 2005-331369 (2005-12-01), None

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