Repeater/switch for distributed arbitration digital data buses

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395309, G06F 1300

Patent

active

057581096

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates generally to the technical field of digital computers and, more particularly, to electronic devices for switching among fully bidirectional digital data buses interconnecting digital computing devices.


BACKGROUND ART

Data buses are used throughout digital computer systems for communicating signals from one portion of the system to another. Digital data buses are used within microprocessor chips to communicate signals between different functional elements included in central processing units ("CPUs") of microprocessors or microcomputers, in floating point coprocessor chips, in memory management unit chips, etc. Within a digital computer but outside such integrated circuit chips, digital data buses communicate signals among those chips and between them and other assemblies included within the computer such as Random Access Memories ("RAM"), Read Only Memories ("ROM") and/or peripheral device input/output circuits. External to the computer, digital data buses communicate signals between it and peripheral devices such as keyboards, display devices, printers, modems, disk drives of various different types and/or tape drives.
Because of the widespread use of digital data buses throughout digital computer systems, myriad different types of buses have been developed over the years together with extremely sophisticated protocols governing the signaling process by which data is transferred over the bus between two devices such as between a digital computer and a peripheral device, e.g. a disk drive or a tape drive. For example, digital data buses and protocols have been developed in which one device, e.g. the digital computer or a portion of the digital computer identified variously by the terms channel or controller, is permanently assigned control of the data bus for transfers of data both to and from the peripheral device. For this type of bus, frequently the device that controls the bus is referred to as the bus master and the other devices connected to the bus are referred to as slaves. Other digital data buses and protocols have been developed in which a bus arbitration circuit separate from all peripheral devices assigns control of the data bus to one or the other of two intercommunicating devices, e.g. either the digital computer or the peripheral device. This type of bus protocol is often called multi-master with centralized arbitration.
A widely used digital data bus having a sophisticated protocol for exchanging data between devices is defined by the American National Standards Institute ("ANSI") X3.131-1986 standard which is incorporated herein by reference. This ANSI standard digital data bus is known colloquially as the Small Computer System Interface ("SCSI") bus. The SCSI bus differs from most prior data buses in several ways. First, devices connect to the SCSI bus in such a way that none of the signal lines in the bus pass through any circuitry in any devices. Rather, each device applies its signals to each of the SCSI bus signal lines. The other devices then receive those signals via the bus. Second, the SCSI bus permits distributed arbitration in which all the devices that arbitrate for the bus at a particular time resolve among themselves which of them will receive control of the bus. This contrasts with the multi-master bus with centralized arbitration.
As defined by the ANSI standard, the SCSI bus includes a DATA BUS having eight bidirectional data signal lines and an optional bidirectional data parity signal line, a termination power line, ground lines, and a set of nine (9) control signal lines, some of which are bidirectional. The 9 control signal lines of the SCSI bus are a Busy ("BSY") signal line, a Select ("SEL") signal line, a Control/Data ("C/D") signal line, an Input/Output ("I/O") signal line, a Message ("MSG") signal line, a Request ("REQ") signal line, an Acknowledge ("ACK") signal line, an Attention ("ATN") signal line, and a Reset ("RST") signal line. Examples of the signals that may be transmitted over these various signal lines

REFERENCES:
patent: 4296469 (1981-10-01), Gunter et al.
patent: 4604689 (1986-08-01), Burger
patent: 4716525 (1987-12-01), Gilanyi et al.
patent: 4821170 (1989-04-01), Bernick et al.
patent: 4864291 (1989-09-01), Korpi
patent: 5239632 (1993-08-01), Larner
patent: 5239653 (1993-08-01), Cubero-Castan et al.
patent: 5274783 (1993-12-01), House et al.
patent: 5367647 (1994-11-01), Coulson et al.
United States Statutory Invention Registration No. H696, Oct. 3, 1989 Willard S. Davidson.
"OEMs Scramble to Launch Diverse SCSI Devices," Barry W. Phillips, Electronic Design, May 26, 1988, pp. 29-34.
"Intelligent Host Adapter Directs I/O Traffic, Freeing Up Host Processor," Robert Snively, Electronic Design, Sep. 20, 1984, pp. 243-252.
"Ethernet Controller Adds Communications to SCSI Bus," Tomas Russ, Electronic Design, Sep. 8, 1988, pp. 91-96.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Repeater/switch for distributed arbitration digital data buses does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Repeater/switch for distributed arbitration digital data buses, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Repeater/switch for distributed arbitration digital data buses will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1975728

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.