Repeater and PLL circuit

Details Repeater and PLL circuit Repeater and PLL circuit

1989-07-11

1991-09-24

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

331 17, 375120, H04L 2552

Patent

active

050520229

ABSTRACT:
A PLL circuit for generating an AC output signal synchronized with an AC input signal applied thereto with a phase offset with respect to the input signal includes, in one embodiment, a charge pump circuit capable of varying the phase offset depending on the frequency of the AC input signal. In a signal transmission network system including a plurality of nodes coupled to a signal transmission line and distanced from one another by various repeat lengths of transmission path, each node has a repeater including such PLL circuit to suppress jitter caused by individual repeat length of transmission over the transmission line and still remaining in an equalized AC signal in each node.

REFERENCES:
patent: 4078157 (1978-03-01), Lender et al.
patent: 4215251 (1980-07-01), Fukuda et al.
patent: 4523157 (1985-06-01), Sato
patent: 4667170 (1987-05-01), Lofgren et al.
patent: 4733404 (1988-03-01), Ostoich
patent: 4749961 (1988-06-01), Kato et al.
patent: 4818950 (1989-04-01), Ranger
IBM Journal of Research Development, vol. 29, No. 6, Nov. 1985, pp. 580-587.

Affiliated with

Also associated with

Rating

Repeater and PLL circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Repeater and PLL circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Repeater and PLL circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1703534