Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Software program
Reexamination Certificate
2005-02-15
2005-02-15
Thomson, W. D. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Software program
C703S027000, C703S014000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C717S135000, C717S151000
Reexamination Certificate
active
06856951
ABSTRACT:
A tool is described herein for optimizing the design of a hardware-software system. The tool allows a designer to evaluate the potential improvement in system performance that may be realized by moving selected software components of the system to a hardware implementation. In one aspect, the tool automatically generates a performance profile of an original form of the system. The performance profile of the original form of the system may be used to select software components of the system to be moved to hardware. In another aspect, the tool generates an estimated performance profile of a repartitioned form of the system by modifying the performance profile of the system. The estimated performance profile of the repartitioned system is compared to the performance profile of the original form of the system to verify benefits, if any, of repartitioning. Such verification is accomplished without the need to actually repartitioning the system or measuring the performance of the entire repartitioned system.
REFERENCES:
patent: 5493672 (1996-02-01), Lau et al.
patent: 5598344 (1997-01-01), Dangelo et al.
patent: 5815206 (1998-09-01), Malladi et al.
patent: 5841967 (1998-11-01), Sample et al.
patent: 5870588 (1999-02-01), Rompaey et al.
patent: 5937184 (1999-08-01), Rao
patent: 6006022 (1999-12-01), Rhim et al.
patent: 6009256 (1999-12-01), Tseng et al.
patent: 6112023 (2000-08-01), Dave et al.
patent: 6230303 (2001-05-01), Dave
patent: 6272451 (2001-08-01), Mason et al.
patent: 6289488 (2001-09-01), Dave et al.
patent: 6356862 (2002-03-01), Bailey
patent: 6415384 (2002-07-01), Dave
patent: 6550042 (2003-04-01), Dave
patent: 6584436 (2003-06-01), Hellestrand et al.
patent: 6622287 (2003-09-01), Henkel
Toporkov, Performance-Complexity Analysis in Hardware-software Codesign for Real-time Systems, IEEE 1995.*
Stoy et al., An Integrated Modelling Technique for Hardware/Software Systems, IEEE Jun. 1994.*
Carreras et al., A Co-design Methodology Based on Formal Specification and High Level Estimation, IEEE 1996.*
Stoy et al., Re-Partioning for Hardware/software Co-Synthesis, IEEE 1997.*
Harkin et al., Accelerating Embedded Applications using Dynamically Reconfigurable Hardware and Evolutionary Algorithms, IEEE 2000.*
Nascimento et al., A Repartitioning and HW/SW Partitioning Alogrithm ot the Automatic Design Space Exploration in the Co-Synthesis of Embedded Systems, IEEE Jun. 2001.
Klein Russell Alan
Moona Rajat
Klarquist & Sparkman, LLP
Thomson W. D.
LandOfFree
Repartitioning performance estimation in a hardware-software... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Repartitioning performance estimation in a hardware-software..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Repartitioning performance estimation in a hardware-software... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3458260