Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated
Reexamination Certificate
2001-08-06
2003-09-09
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
C438S106000
Reexamination Certificate
active
06617700
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a semiconductor integrated circuit device and, more particularly, to a reparable multi-chip package that can be used even though some defective chips are included in the package, and further to a high-density memory card having the repairable multi-chip package.
2. Description of the Prior Art
Digital devices, such as an MP3 phone, an MP3 player, a digital camera, and so on, typically use a memory card for read/write of data. The memory card includes a non-volatile memory chip such as a flash memory chip as a storage device. In recent years, new packaging technologies have been developed to increase the memory density of the memory card according to the trend toward enhanced integration and multi-functionality. As the needs of customers or buyers of high-density memory cards are ahead of the latest development in memory chip technology, a new solution using a multi-chip mounting technology has been proposed.
An exemplary multi-chip package of the prior art is shown in
FIGS. 1A and 1B
. As illustrated, the multi-chip package (
10
) contains two or more memory chips (
13
a,
13
b
) mounted on a single circuit substrate (
11
). Plural metallic wires (
15
), i.e., bonding wires, are provided for electrical connections between each memory chip (
13
a,
13
b
) and the substrate (
11
). That is, chip pads or bond pads (
14
) formed on the chips (
13
a,
13
b
) are coupled to one end of the wires (
15
), whereas bonding tips (
12
a,
12
b
) formed on the top surface of the substrate (
11
) are coupled to the other end of the wires (
15
). The bonding tips (
12
a,
12
b
) are electrically connected to external contact pads (
17
) formed on the bottom surface of the substrate (
11
) via through holes. The chips (
13
a,
13
b
), the wires (
15
), and the bonding tips (
12
a,
12
b
) are sealed in a mold layer (
16
).
The use of several memory chips (
13
a,
13
b
) gives the multi-chip package (
10
) an advantage of an increase in memory density of the memory card in comparison with a single-chip package.
However, the multi-chip package (
10
) has problems with yield. As well known in the art, the multi-chip package (
10
) should undergo various reliability tests for verifying the quality of each chip (
13
a,
13
b
) after packaging or assembling processes are completed. If any chip (
13
a,
13
b
) is ascertained to be defective with the tests, the entire multi-chip package (
10
) cannot be repaired or used since all the chips (
13
a,
13
b
) are sealed in the mold layer (
16
). Therefore, the multi-chip package has a yield loss greater than that of the single-chip package.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a repairable multi-chip package. The multi-chip package is made available by a repair process after packaging processes even though some chips contained therein are defective.
Moreover, another object of the present invention is to improve the yield of the multi-chip package.
Still another object of the present invention is to provide a high-density memory card utilizing the repairable multi-chip package.
According to one embodiment of the present invention, a repairable multi-chip package includes a substrate, which has a plurality of bonding tips on a first surface thereof and a plurality of external contact pads on a second surface thereof. The bonding tips and the external contact pads are electrically connected to each other. The multi-chip package also includes at least two memory chips each of which is mounted on the first surface of the substrate and has a plurality of chip pads formed on a top surface thereof. The multi-chip package further includes a plurality of electrically connecting members, which couple respectively each bonding tip to a corresponding. Moreover, the multi-chip package includes an encapsulation layer, which covers the chips and the electrically connecting members. In particular, the encapsulation layer is divided into two or more parts, and the bonding tips are partially embedded in and partially exposed out of the divided encapsulation layer. Accordingly, the exposed bonding tips can be selectively cut or re-connected for repairing the multi-chip package and thereby for obtaining availability.
In another embodiment of the present invention, the memory chips may include at least one normal chip and at least one mirror chip, each of which has a symmetrical arrangement of the chip pads in comparison with the other chip. The normal chip and the mirror chip may be separately embedded in the parts of the divided encapsulation layer. In addition, the bonding tips may have central bonding tips disposed between the parts of the divided encapsulation layer, and the chip pads may have data input/output pads. The data input/output pads of both the normal chip and the mirror chip may be connected in common to the central bonding tips. Moreover, an electrically conductive material and a cutting tool are used for a selective re-connection and a selective cut of the bonding tips, respectively.
According to yet another aspect of the present invention, a high-density memory card includes the above-described repairable multi-chip package. The multi-chip package is accommodated in and joined to a base card by a joining member such as an adhesive to constitute the memory card.
REFERENCES:
patent: 5148265 (1992-09-01), Khandros et al.
patent: 6051878 (2000-04-01), Akram et al.
patent: 6093969 (2000-07-01), Lin
patent: 6281578 (2001-08-01), Lo et al.
Kwon Young-Shin
Lee Joon-Ki
Song Young-Hee
Le Thao P
Marger & Johnson & McCollom, P.C.
Nelms David
Samsung Electronics Co,. Ltd
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