Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-05-02
2003-05-27
Meier, Stephen D. (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S613000
Reexamination Certificate
active
06569708
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a flip chip semiconductor device and a method of manufacturing such a flip chip semiconductor device.
2. Description of the Related Art
FIG. 1
of the accompanying drawings shows a process of mounting a conventional flip chip semiconductor device on a board. As shown in
FIG. 1
, flip chip semiconductor device
1
is placed on board
2
, and then flip chip semiconductor device
1
and board
2
are joined to each other by solder bumps
3
that have been provided on flip chip semiconductor device
1
. Then, the gap between flip chip semiconductor device
1
and board
2
is sealed by being filled up with resin
4
. Resin
4
which has thus sealed the gap between flip chip semiconductor device
1
and board
2
is effective to prevent the packaging reliability from being reduced due to the difference between the coefficients of thermal expansion of board
2
and flip chip semiconductor device
1
.
However, after the gap between flip chip semiconductor device
1
and board
2
has been sealed by resin
4
, it is not easy to remove flip chip semiconductor device
1
from board
2
. Therefore, when a certain fault occurs in the assembly, it is unavoidable to throw away flip chip semiconductor device
1
that is of a high added value even if flip chip semiconductor device
1
itself is not malfunctioning. Furthermore, when flip chip semiconductor device
1
suffers a failure, board
2
and other devices mounted thereon need to be discarded even if board
2
and other devices are not faulty.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a flip chip semiconductor device which can be mounted on a board so that it can easily be removed, without a reduction in the packaging reliability due to the difference between the coefficients of thermal expansion of the flip chip semiconductor device and the board, and a method of manufacturing such a flip chip semiconductor device.
To achieve the above object, a flip chip semiconductor device according to the present invention has a semiconductor chip, external solder electrodes, and an intermediate layer joined to and interposed between the semiconductor chip and the external solder electrodes. The external solder electrodes are arranged in a pattern identical to the pattern of solder bumps that are disposed on the semiconductor chip. The intermediate layer electrically connects the solder bumps to the external solder electrodes independently of each other.
The flip chip semiconductor device can be mounted on a desired board by melting the external solder electrodes. Stresses produced due to the difference between coefficients of thermal expansion between the board and the semiconductor chip can be absorbed by the intermediate layer. Therefore, the flip chip semiconductor is of excellent packaging reliability. Furthermore, the flip chip semiconductor that has been mounted on the board can easily be removed from the board for repair by melting the external solder electrodes.
In a method of manufacturing a flip chip semiconductor device according to a first embodiment of the present invention, a semiconductor chip and a multilayer plate, i.e., a three-layer plate, are prepared. The multilayer plate comprises a second layer as an electrically conductive layer and first and third layers disposed on respective opposite surfaces of the second layer and comprising metal layers of one metal, specifically copper.
The first layer of the multilayer plate is etched in a predetermined pattern to form a first group of posts which have a pattern identical to the pattern of a group of solder bumps on the semiconductor chip. Similarly, the third layer is etched in a predetermined pattern to form a second group of posts.
Then, the semiconductor chip is positioned to hold the solder bumps in contact with the posts of the first group, and the solder bumps are melted to join the solder bumps to the posts of the first group. The second layer is cut between the posts of the first and second groups. In particular, the second layer can be cut by mechanically applying a force to the second layer. In this manner, separate multilayer posts are produced which comprise the posts of the first group and the posts of the second group.
If necessary, a resin layer is formed in surrounding relation to the multilayer posts. The resin layer may be formed by preparing a film having a size equal to or greater than the semiconductor chip, positioning the film in abutment against the posts of the second group, filling and setting a resin in the gap between the semiconductor chip and the film, and removing the film.
If necessary, external solder electrodes are formed on the respective tip ends of the multilayer posts. In this fashion, there is manufactured a flip chip semiconductor device comprising a semiconductor chip, an intermediate layer including a group of multilayer posts disposed in and joined to a surface of the semiconductor chip in a predetermined pattern and a resin layer surrounding the multilayer posts, and external solder electrodes joined to the respective tip ends of the multilayer posts.
According to another embodiment, the second layer may comprise a solder layer. In this case, the second layer may be cut by heating the second layer.
In a method of manufacturing a flip chip semiconductor device according to a second embodiment of the present invention, a semiconductor chip and two metal plates are prepared.
The first metal plate is etched in a predetermined pattern to form a first group of posts in a pattern identical to the pattern of a group of solder bumps on the semiconductor chip. Specifically, the first metal plate is etched to a certain depth somewhere along its thickness according to a half-etching process. Similarly, the second metal plate is half-etched to form a second group of posts.
Then, solder layers are formed on the tip ends of the posts of the first group and/or the posts of the second group. The metal plates are matched to hold the posts of the first group and the posts of the second group in confronting relation to each other, and the solder layers are melted to join the metal plates to each other.
A first resin is filled and set in the gap between the metal plates, producing a first resin layer. Joints between the posts of each of the first and second groups of the metal plates are etched to produce a composite body which comprises separate multilayer posts and the first resin layer surrounding the multilayer posts.
Then, the semiconductor chip is positioned to hold the solder bumps in contact with the posts of the first group, and the solder bumps are melted and joined to the posts of the first group.
A second resin may then be filled and set in the gap between the semiconductor chip and the composite body, producing a second resin layer. If necessary, external solder electrodes are formed on the respective tip ends of the multilayer posts.
The above steps of the manufacturing methods may be combined to fabricate multilayer posts comprising an increased number of layers.
The above and other objects, features, and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings which illustrate examples of the present invention.
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patent: 5798285 (1998-08-01), Bentlage et al.
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Duong Khanh
Katten Muchin Zavis & Rosenman
Meier Stephen D.
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