Repair circuit of semiconductor memory device

Details Repair circuit of semiconductor memory device Repair circuit of semiconductor memory device

2008-07-29

2008-07-29

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S200000

Reexamination Certificate

active

11485281

ABSTRACT:
An embodiment of the present invention relates to a repair circuit of a semiconductor memory device. The repair circuit includes an address counter that sequentially generates a first column address signal and a second column address signal in response to a write enable signal or a read enable signal, a repair controller that generates a repair column address signal earlier than the second column address signal in response to the first column address signal, an address latch enable signal, a command enable signal, and a write enable signal, and a repair scramble unit that selects a repair cell in response to a repair I/O control signal and the repair column address signal. If an address on which a repair operation must be performed occurs, the repair controller directly receives the write enable signal or the read enable signal and activates the repair controller earlier than a general cell using a previous address, thereby offsetting an operating time consumed in the repair controller. Therefore, the operating speed of the repair cell can become faster than that of the general cell and the operating speed of the device can be improved accordingly.

REFERENCES:
patent: 6144592 (2000-11-01), Kanda
patent: 2002/0044489 (2002-04-01), Kim
patent: 2005/0226065 (2005-10-01), Yoon et al.
patent: 1020030002636 (2003-01-01), None
patent: 1020050073232 (2005-07-01), None
Patent Gazette for KR 10-0739253. (Jul. 2007).

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