Removal rate behavior of spin-on dielectrics with chemical mecha

Details Removal rate behavior of spin-on dielectrics with chemical mecha Removal rate behavior of spin-on dielectrics with chemical mecha

1996-06-24

1999-09-14

Nguyen, Nam

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438692, 438699, 438747, 216 38, 216 52, 216 89, 216 90, 216 99, H01L 21463

Patent

active

059522437

ABSTRACT:
A method for forming a gap-filled, planarization structure of dielectric materials on a substrate topography useful for forming microelectronic devices. A dielectric material is first deposited as continuous, dry dielectric layer, preferably a SOG layer. Then the dielectric layer is partially removed by chemical-mechanical polishing (CMP). The chemical and mechanical properties of the structure can be chosen by varying the composition of the SOG layer and the subsequent CMP conditions.

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Homma et al., Feb. 22-23, 1996 CMP-MIC Conference, pp. 67-73, "Selective CMP of Organic SOG for Low Parasitic Capacitance Quarter-Micron, Multilevel Interconnections".

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