Remote processor crash recovery

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Details

371 7, 371 16, G06F 1100

Patent

active

045890900

ABSTRACT:
The present invention is a multiprocessor machine control system in which the failure of one of the processors to reset can be ignored by the rest of the control system. In particular, a software crash or other abnormality on one of the processors will generate a reset procedure. If the processor cannot be reset, this will indicate a processor board failure such as a hardware failure. If the processor and its controlled elements are not crucial to the machine operation, then the control wll ignore the failed processor as though it were not in the control system, and continue with machine operation.

REFERENCES:
patent: 3478324 (1969-11-01), Couleur et al.
patent: 4151590 (1979-04-01), Azezumi
patent: 4206996 (1980-06-01), Clark et al.
patent: 4321666 (1982-03-01), Tasar et al.
patent: 4443849 (1984-04-01), Ohwada

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