Remote multiplexer terminal with redundant central processor uni

Details Remote multiplexer terminal with redundant central processor uni Remote multiplexer terminal with redundant central processor uni

1983-11-08

1986-09-02

Fleming, Michael R.

Excavating

371 66, G06F 1120

Patent

active

046100130

ABSTRACT:
An approach is disclosed for accomplishing redundancy in the central processor units of a remote multiplexer terminal (RMT). Through execution of a stored software program the RMT receives data from input/output devices, processes that data and transmits it to external equipment. The system uses two central processor units (CPU's), each with its own input/output (I/O) bus. Both CPU's actively and continuously monitor the status of the I/O subsystems. The software program designates one CPU as the "Master", the other CPU as the "Slave". The CPU designated as "Master" performs active control functions so long as error detection circuitry within each CPU determines that the operational status of the "Master" is good. Error detection is accomplished by incorporation of a "Watch Dog Timer" in each CPU. A failing CPU is redesignated to be a Slave (and is halted) and the previously designated Slave CPU is redesignated as a Master. Since it has been "shadowing" the old Master CPU, the new Master CPU has a current record of the status of the I/O subsystems stored in its memory. Using this data, the new Master CPU assumes control over all of the I/O functions that were previously being controlled by the old Master CPU. No physical switchover occurs - only a software failover.

REFERENCES:
patent: 3795800 (1974-03-01), Nimmo
patent: 4010239 (1978-05-01), Twibell
patent: 4072852 (1978-02-01), Hogan
patent: 4099255 (1978-07-01), Stanley
patent: 4282574 (1981-08-01), Yoshida
patent: 4466098 (1984-08-01), Southard

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