Reload-timer/counter circuit

Details Reload-timer/counter circuit Reload-timer/counter circuit

1993-08-09

1995-01-17

Sikes, William L.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Counter controlled counter

377 52, 377 55, 377 56, 377110, 364569, 3649427, 368113, G06F 578, G06F 114, H03K 2100

Patent

active

053832302

ABSTRACT:
A reload-timer/counter circuit provides a reload-timer function and a counter function commonly and selectively. The circuit is comprised of first, second, third, and fourth registers. The third and fourth registers act as a control status register and a mode register, respectively. The first and second registers act as, in the reload-timer mode a data register and a counter register, respectively, while in the counter mode, the first and second registers act as the counter registers.

REFERENCES:
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patent: 4942559 (1990-07-01), Fleck et al.
patent: 5081297 (1992-01-01), Lebel et al.
G. J. Stephens--"Programmable Event Timer" IBM Technical Disclosure Bulletin--vol. 22--No. 2--Jul. 1979--pp. 785-786.
H. D. Bryce, "Versatile programmable module meets .mu.P timing needs," EDN, vol. 25, No. 18, Oct. 1980, pp. 145-153.
B. Huston, "On-chip peripherals simplify system hardware and software," WESCON CONFERENCE RECORD, vol. 24, Sep. 16-18, 1980, pp. 1-9.

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