Reliable low thermal resistance package for high power flip clip

Details Reliable low thermal resistance package for high power flip clip Reliable low thermal resistance package for high power flip clip

1994-10-07

1996-12-17

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257710, 257713, 257729, 257778, 257783, H01L 2310, H01L 2334

Patent

active

055856713

ABSTRACT:
A flip-chip IC package (10) provides a thermally-conductive lid (20) attached to a backside of the chip (12) by a die attach layer (18) of a predetermined thickness range. A rim (22), preferably KOVAR iron-nickel alloy, is formed on the lid (20) with a depth (44) less than a sum (42) of a thickness of the chip, the interconnects (16), and a minimum final thickness (40) of the die attach layer (18) by a predetermined margin (46). An initial thickness of thermally-filled epoxy is applied to the backside of the chip and a layer of lid attach epoxy (24) is applied to the rim of the lid in a thickness sufficient to span the predetermined margin. The lid is floated on the die attach layer (18) with the rim of the lid surrounding the chip and floating on the lid attach material. The lid is clamped against the chip with a force sufficient to compress the die attach material to a predetermined thickness in a range less than the initial thickness and not less than the minimum final thickness (40). An oxide layer, such as an iron or iron-alloy oxide layer, is formed on the bottom surface of the rim. A spacer is placed on the backside of the chip within the die attach material (18), to define the minimum final thickness (40) of the die attach layer. A beveled or stepped vent hole is formed in the lid and plugged and sealed.

REFERENCES:
patent: 5126829 (1992-06-01), Daikoku et al.
patent: 5175613 (1992-12-01), Barker, III et al.
patent: 5276586 (1994-01-01), Hatsuda et al.
patent: 5329160 (1994-07-01), Miura et al.

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