Relaxed layout for storage nodes for dynamic random access memor

Details Relaxed layout for storage nodes for dynamic random access memor Relaxed layout for storage nodes for dynamic random access memor

1999-06-10

2000-12-26

Nguyen, Tan T.

Static information storage and retrieval

Interconnection arrangements

365 51, G11C 502

Patent

active

061669415

ABSTRACT:
A memory cell structure (10) includes a plurality of bit lines (12) and intersecting word lines (14). Bit line contacts (16) are spaced evenly apart on an associated bit line (12). A plurality of storage nodes (20) and associated storage node contacts (18) are provided. Storage nodes (20) and storage node contacts (2) are spaced evenly apart along the associated bit line (12). The storage nodes (20) and storage node contacts (18) are offset with respect to storage nodes (20) and storage node contacts (18) placed along adjacent bit lines (12).

REFERENCES:
patent: 5315542 (1994-05-01), Melzner
patent: 5383151 (1995-01-01), Onishi et al.
patent: 5566104 (1996-10-01), Shinkawata
patent: 6026010 (2000-02-01), Ema et al.

Affiliated with

Also associated with

Rating

Relaxed layout for storage nodes for dynamic random access memor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Relaxed layout for storage nodes for dynamic random access memor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Relaxed layout for storage nodes for dynamic random access memor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1002158