Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Having graded composition
Reexamination Certificate
2001-03-13
2002-12-17
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Having graded composition
C257S192000
Reexamination Certificate
active
06495868
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to the field of lattice-mismatched epitaxy, and in particular to the field of creating lattice-mismatched devices based on relaxed InGaAs alloys.
Most electronic and optoelectronic devices that require layers deposited by epitaxial growth utilize lattice-matched epitaxial layers, i.e. the crystal structure of the layer has the same lattice constant as that of the substrate. This lattice-matching criterion has been important in creating high quality materials and devices, since lattice-mismatch will create stress and in turn introduce dislocations and other defects into the layers. The dislocations and other defects will often degrade device performance, and more importantly, reduce the reliability of the device.
The applications of lattice-mismatched layers are numerous. In the InGaAs material system, one important composition is in the range of 20-30% In. These compositions would allow the fabrication of 1.3 &mgr;m optical devices on GaAs substrates, as well as high electron mobility transistors with superior performance on GaAs substrates. Alloys in the desired composition range are lattice-mismatched to GaAs and InP substrates, and therefore usually suffer from high dislocation densities. One known method to minimize the number of dislocations reaching the surface of a relaxed, mismatched layer is to compositionally grade the material (in this case through grading the In composition) so that the lattice-mismatched is reduced over a great thickness.
Compositional grading is typically accomplished in InGaAs alloys by grading the In composition at a low temperature of growth, typically less than 500° C. The dominant technique for depositing these relaxed layers in the InGaAs system has been molecular beam epitaxy (MBE). The MBE has a limited growth rate, and therefore the growth of these relaxed buffers is tedious and costly. A supply of virtual InGaAs substrates (i.e., a GaAs substrate with a relaxed InGaAs layer of high quality at the surface) would be in demand commercially, since the user could buy the substrate and deposit the device layers without having to deposit the graded InGaAs layer. To create a supply of these wafers at low cost, metalorganic chemical vapor deposition (MOCVD) offers greater potential.
There have been no successful reports of high quality relaxed graded InGaAs layers grown by MOCVD. There are fundamental materials problems with InGaAs graded layers grown in a certain temperature window. Thus, most attempts to grow relaxed layers with MOCVD have most likely failed for attempting to grow the layers under standard conditions, i.e. temperatures in the deleterious window.
SUMMARY OF THE INVENTION
It is therefore an object of the invention that with the appropriate grading rate, there is an unforeseen higher temperature window, which can be accessed with MOCVD and not MBE, in which high quality relaxed InGaAs alloys can be grown. Relaxed InGaAs grown with MOCVD in this temperature range have the economic advantages of using the MOCVD technique, as well as creating completely relaxed InGaAs layers of high quality.
Another object of the invention is to allow the fabrication of relaxed high quality InGaAs alloys on GaAs substrate with the MOCVD deposition technique. These virtual InGaAs substrates can be used in a variety of applications, in particular 1.3 &mgr;m optical devices and high-speed microwave transistors can be fabricated on such substrates. It is a further object of the invention to disclose the appropriate conditions during growth in which it is possible to achieve high quality material and devices using this InGaAs/GaAs.
In
x
Ga
1−x
As structures with compositionally graded buffers grown with organometallic vapor phase epitaxy (OMPVE) on GaAs substrates and characterized with plan-view and cross-sectional transmission electron microscopy (PV-TEM and X-TEM), atomic force microscopy (AFM), and x-ray diffraction (XRD). Surface roughness experiences a maximum at growth temperatures near 550° C. The strain fields from misfit dislocations induce a deleterious defect structure in the <110 > directions. At growth temperatures above and below this temperature, the surface roughness is decreased significantly; however, only growth temperatures above this regime ensure nearly complete relaxed graded buffers with the most uniform composition caps and highest quality material. With the optimum growth temperature for grading In
x
Ga
1−x
As determined to be 700° C., it was possible to produce In
0.33
Ga
0.67
As diodes on GaAs with threading dislocation densities <8.5×10
6
/cm
2
.
Accordingly, the present invention provides a method of processing semiconductor materials, including providing a substrate of GaAs; and epitaxially growing a relaxed graded layer of In
x
Ga
1−x
As at a temperature ranging upwards from about 600° C.
The present invention also provides a semiconductor structure including a substrate of GaAs, and a relaxed graded layer of In
x
Ga
1−x
As which is epitaxially grown at a temperature ranging upwards from about 600° C.
These and other objects, features and advantages of the present invention will become apparent in light of the following detailed description of preferred embodiments thereof, as illustrated in the accompanying drawings.
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Chyi et a
Bulsara Mayank T.
Fitzgerald Eugene A.
Massachusetts Institute of Technology
Meier Stephen D.
Testa Hurwitz & Thibeault LLP
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