Relaxation oscillation logic in Josephson junction circuits

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307212, 331107S, H03K 19195, H03K 1920

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active

042490944

ABSTRACT:
A DC powered, self-resetting Josephson junction logic circuit relying on relaxation oscillations is described. A pair of Josephson junction gates are connected in series, a first shunt is connected in parallel with one of the gates, and a second shunt is connected in parallel with the series combination of gates. The resistance of the shunts and the DC bias current bias the gates so that they are capable of undergoing relaxation oscillations. The first shunt forms an output line whereas the second shunt forms a control loop. The bias current is applied to the gates so that, in the quiescent state, the gate in parallel with the second shunt is at V=O, and the other gate is undergoing relaxation oscillations. By controlling the state of the first gate with the current in the output loop of another identical circuit, the invert function is performed.

REFERENCES:
patent: 3564351 (1971-02-01), McCumber
patent: 3953749 (1976-04-01), Baechtold et al.
patent: 4012642 (1977-03-01), Gueret
patent: 4051393 (1977-09-01), Fulton
patent: 4097765 (1978-06-01), Zappe
F. L. Vernon, Jr. et al., "Relaxation Oscillations in Josephson Junctions", Journal of Applied Physics, vol. 39, No. 6, May 1968, pp. 2661-2664.
H. W. Chan et al., "High-speed switching and logic circuits using Josephson Devices", IEEE Transactions on Magnetics, vol. Mag-11, No. 2, Mar. 1975, pp. 770-773.
H. H. Zappe, "Josephson Quantum Interference Computer Devices", IEEE Transactions on Magnetics, vol. Mag-13, No. 1, Jan. 1977, pp. 41-47.

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