Relative coordinates for triangle rendering

Details Relative coordinates for triangle rendering Relative coordinates for triangle rendering

2001-10-23

2004-06-08

Bella, Matthew C. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics processing

Attributes

C345S586000, C345S606000

Reexamination Certificate

active

06747659

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the field of digital signal processing and, more particularly, to a system and method for interpolating sample values based on known values at the vertices of a triangle.
2. Description of the Related Art
Graphics systems are configured to receive a stream of graphics data and generate video output pixels in response to the graphics data. The graphics data stream specifies vertices for triangles which define 3D graphics content. The graphics system may generate an N×M array of video output pixels per frame. The graphics system may internally represent pixel positions as K bit integer quantities. The value K is typically chosen so that pixel coordinates may vary from 0 to max{N−1,M−1}. Vertex positions or super-sample positions may be represented as (K+L) bit fixed-point quantities, i.e. L additional bits may be used for fractional positions between pixel positions. In prior art graphics system many of the rendering computations to determine sample (or pixel) colors triangles are performed at (K+L) bits of precision or approximately (K+L) bits of precision. However, hardware elements (e.g. adders, multipliers, multiplexors, etc.) that support (K+L) bit operands may be expensive, may consume a large amount of board area, and may consume a large amount of power. Thus, there exists a need for a system and method which could generate sample/pixel color values with smaller length data operands.
SUMMARY OF THE INVENTION
A graphics system may, in one embodiment, comprise a rendering unit, a sample buffer, and a sample-to-pixel calculation unit. The rendering unit may comprise one or more processors (e.g. DSP chips), dedicated hardware, or any combination thereof. The rendering unit may be configured to receive graphics data including three vertices defining a triangle and determine boundary coordinates for a group (e.g. a bounding box) of bins which contains the triangle. Many of positional quantities used to determine sample ordinate values (e.g. color values) for the triangle may be expressed as relative coordinates with respect to an origin (e.g. a corner) of the containing group. Because the relative coordinates have a smaller range of attainable magnitudes, they may be stored with fewer bits than the original absolute coordinates. Rendering computations which use the relative coordinates may use smaller hardware elements than if the absolute coordinates were used.
Relative x and y coordinates may be computed for each of the triangle vertices. The rendering unit may generate relative coordinates for sample positions in the bins of the containing group, and may filter the sample positions to determine interior sample positions which reside inside the triangle. Furthermore, the rendering unit may interpolate sample ordinate values for the interior sample positions based on the relative x and y coordinates of the vertices and vertex ordinate values corresponding to the vertices. The sample ordinate values may be stored in the sample buffer.
The sample-to-pixel calculation unit may be configured to select and filter sample ordinate values from the sample buffer to determine output pixel values. The output pixel values may be transformed into an analog video signal for transmission to a display device.


REFERENCES:
patent: 5448686 (1995-09-01), Borrel et al.
patent: 5479596 (1995-12-01), Capps et al.
patent: 2002/0158856 (2002-10-01), Deering et al.
patent: 2002/0167523 (2002-11-01), Taylor et al.

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