Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
1999-07-30
2001-05-29
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S669000, C257S676000, C257S690000, C257S778000
Reexamination Certificate
active
06239489
ABSTRACT:
TECHNICAL FIELD
The present invention relates to apparatus and methods of reinforcement of lead bonding in microelectronics packages.
BACKGROUND OF THE INVENTION
Microelectronics packages are required to operate under a variety of conditions, including repetitive or cyclical variations in the temperature of the operating environment. Typically, quality assurance testing of microelectronics packages involves subjecting the packages to repetitive thermal cycling during a procedure known as “burn in” testing. As the trend toward decreasing the size of microelectronic packages continues, the problems associated with repetitive thermal cycling during testing and operation become more pronounced.
FIG. 1
is a partial cross-sectional elevational view of a portion of a micro-ball grid array (micro-BGA) package
10
in accordance with the prior art. The micro-BGA package
10
includes a die
12
having a plurality of bond pads
14
formed thereon. The micro-BGA package
10
also includes an interposer (or lead frame)
16
having a dielectric substrate
18
with a plurality of contact pads
20
formed thereon.
A spacing layer
22
is disposed between the die
12
and the interposer
16
, and a plurality of conductive leads
24
coupled between the die
12
to the interposer
16
. Each conductive lead
24
has a first end
26
bonded to one of the bond pads
14
and a second end
28
bonded to one of the contact pads
20
, thereby electrically coupling the die
12
to the interposer
16
. An encapsulating material
30
is disposed over the conductive leads
24
and the exposed areas of the die
12
to seal and protect the fragile conductive leads
24
and circuitry of the die
12
from the environment. Finally, a conductive bump
32
is formed on each of the contact pads
20
. Micro-BGA packages of the type shown in
FIG. 1
, and methods of forming such packages, are shown and described, for example, in U.S. Pat. Nos. 5,663,106 and 5,777,379 to Karavakis et al, and in U.S. Pat. No. 5,821,608 to DiStefano et al, which are incorporated herein by reference.
Typically, the bond pads
14
may be formed of aluminum or other suitable electrically-conductive material while the die
12
is primarily composed of silicon. The dielectric substrate
18
of the interposer
16
may be a molded plastic or ceramic material, and the contact pads
20
may be aluminum or other suitable metallic material. Gold wires are typically used for the conductive leads
24
. Due to the significant differences in the coefficient of thermal expansion (CTE) of these materials, significant mechanical stresses may develop in the micro-BGA package
10
due to the CTE mismatch of these components as the package is subjected to a range of temperatures during testing or in operation.
One prominent problem attributable to the differences in CTE of the components of the micro-BGA package is detachment of the first end
26
of the conductive lead
24
from the bond pad
14
of the die
12
. Because the interposer
16
and die
12
have different CTE, temperature fluctuations cause mechanical stresses to develop along and within the bond between the first end
26
and the bond pad
14
. After repeated thermal cycling, the bond fatigues and the first end
26
of the conductive lead
24
becomes detached from the bond pad
14
. The problem of detachment of the conductive lead
24
from the bond pad
14
is commonly referred to as “bond liftoff.”
Efforts have been made to prevent bond liftoff of the first end
26
of the conductive lead
24
from the bond pad
14
. For example, as described in U.S. Pat. No. 5,821,608, the conductive leads
24
may have a laterally curved or expandable middle section
27
(
FIG. 1
) that allows the conductive lead
24
to flex and bend slightly during thermal cycling, thereby reducing the mechanical stress on the solder interface. As the micro-BGA package
10
is heated or cooled, the relative movement of the components due to CTE mismatch is taken up by the flexible, bendable middle section
27
, preventing stresses from building up in the bond between the bond pad
14
and the first end
26
.
Also, the spacing layer
22
may be formed of a complaint or elastomer material that further reduces the stress on the solder interface due to CTE mismatch between the interposer
16
and the die
12
, as disclosed in U.S. Pat. Nos. 5,148,265 and 5,148,266, which are incorporated herein by reference. The flexibility of the spacing layer
22
allows relative movement between the die
12
and the interposer
16
during thermal cycling, preventing the development of stresses induced by the CTE mismatch.
To permit the desired flexure of the conductive leads
24
or the spacing layer
22
in the above-described micro-BGA packages
10
, the encapsulating material
30
is composed of a material having a low modulus of elasticity, a low bond strength, a high CTE, and a low glass transition temperature. The glass transition temperature (T
G
) of a material is the temperature at which an amorphous polymeric material changes from a hard, relatively brittle condition to a soft, relatively rubbery condition. Thus, in the above-described prior art packages, the encapsulating material
30
is typically composed of a soft, compliant polymeric material, such as silicone rubber or other castable elastomer, having a modulus of elasticity typically from about 400 psi to about 800 psi, a CTE from about 100 to about 300 ppm/° C., and T
G
from about −120 to about 10° C.
These efforts, however, have not been completely effective in preventing bond liftoff of the conductive leads
24
from the bond pads
14
during repeated thermal cycling or due to other sources of stress.
SUMMARY OF THE INVENTION
The present invention relates to an apparatus and method of reinforcement of lead bonding in microelectronics packages. In one aspect of the invention, a microelectronics package includes a microelectronics device having a bond pad, a conductive lead having a first end bonded to the bond pad, an encapsulating material at least partially disposed about the conductive lead, and a reinforcement portion at least partially disposed about the lead bond and at least partially coupling the first end to the bond pad, the reinforcement portion having a greater bond strength and a greater modulus of elasticity than the encapsulating material. During thermal cycling of the microelectronics package, bond liftoff due to CTE mismatch is prevented by the reinforcement portion, which supports the bond between the conductive lead and the bond pad.
In another aspect of the invention, the reinforcement portion comprises a non-conductive adhesive material that physically secures the conductive lead to the bond pad. Alternately, the reinforcement portion comprises an electrically conductive adhesive material that both physically and/or electrically couples the conductive lead to the bond pad.
In yet another aspect of the invention, a microelectronics package includes a plurality of conductive leads and bond pads, and the reinforcement portion is at least partially disposed about a plurality of lead bonds. In this aspect, the reinforcement portion may comprises a non-conductive adhesive material, or an anisotropically conductive material.
REFERENCES:
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5148266 (1992-09-01), Khandros et al.
patent: 5619065 (1997-04-01), Kim
patent: 5663106 (1997-09-01), Karavakis et al.
patent: 5757068 (1998-05-01), Kata et al.
patent: 5801446 (1998-09-01), DiStefano et al.
patent: 5821608 (1998-10-01), DiStefano et al.
patent: 5886415 (1999-03-01), Akagawa
patent: 5990563 (1999-11-01), Kim
patent: 6028354 (2000-02-01), Hoffman
patent: 6049128 (2000-04-01), Kitano et al.
patent: 9-260533 (1997-10-01), None
Chambliss Alonzo
Chaudhuri Olik
Dorsey & Whitney LLP
Micro)n Technology, Inc.
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