Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2001-04-25
2004-07-20
Chaudhuri, Olik (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S701000, C257S729000, C257S782000, C257S783000, C438S460000, C438S464000, C438S465000
Reexamination Certificate
active
06765289
ABSTRACT:
This application is based on Patent Application No. 2000-126609 filed Apr. 26, 2000 and No. 2001-124757 filed Apr. 23, 2001 in Japan, the content of which is incorporated hereinto by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to reinforcing material for a silicon wafer and to a method of manufacture of IC chips using said reinforcing material. In particular, the present invention relates to a reinforcing material provided on a silicon wafer for the purpose of preventing damage of the silicon wafer during dicing and of IC chips employing such wafers after dicing, and to a method of manufacture of IC chips using said reinforcing material.
2. Description of the Related Art
In recent years, in accordance with thinning of IC chip package, thinning of IC chips themselves has been attempted. Especially the thinning of the IC chips for IC cards it is essential to thin as far as possible, since they are not packaged but they connect themselves directly to the circuits of substrates.
Thinning of IC chips is generally accomplished by back-grinding of silicon wafers. Practically they are required to be as thick as 150 to 200 &mgr;m, though the thinner the better, considering that they are mounted on IC cards. IC chips as thick as 200 &mgr;m or below, especially 150 &mgr;m or below are generally easily breakable. Chip breaking particularly tends to occur during dicing of silicon wafers to form IC chips, during picking up of IC chips, during wire bonding, or during mounting on substrate circuits in the face-down process. Therefore, prevention of silicon wafer damaging during dicing and chip breaking are desired as IC chips become thinner.
The Japanese Patent Application Laid-open No. 2000-148960 discloses a technology for a semiconductor apparatus that forms IC cards by simultaneously attaching plurality of pieces of reinforcing metal to plurality of IC chips. In this technology, reinforcing metal pieces are attached after formation of IC chips by dicing silicon wafers on which circuits are formed. Therefore, damage prevention of silicon wafers during dicing is also desired in such a technology.
SUMMARY OF THE INVENTION
It is the purpose of the present invention to provide reinforcing materials for silicon wafers that prevent damage of silicon wafers during dicing, and further prevent damage of IC chips obtained by dicing to make IC chips easier to handle.
In order to solve the above mentioned problem, the reinforcing materials for silicon wafers of the present invention are characterized by being attached to the surfaces of wafers on which circuits are not formed before dicing said silicon wafer on which circuits are formed, said reinforcing material being comprised of base material and an adhesive, and having Rockwell hardness of 60 or above.
Said adhesive is preferably provided on one side of said base material, or impregnated in said base material. Rockwell hardness of said base materials is preferably 60 or above. Further, said adhesive is preferably curable adhesive, the Rockwell hardness of said reinforcing material after said curable adhesive is cured is preferably 60 or above.
The method of manufacture of IC chips of the present invention is characterized by having a step of providing reinforcing material on the surface of a silicon wafer on which circuits are not formed, before dicing of said silicon wafer on which circuits are formed, and a step of simultaneous dicing of said silicon wafer and the reinforcing material provided on said silicon wafer, said reinforcing material being comprised of base material and adhesive and having Rockwell hardness of 60 or above. The method of manufacture of said IC chips preferably has a step of curing of said adhesive forming reinforcing material, before dicing of said silicon wafers.
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Lide, D. R.; CRC Handbook of Chemistry and Physics; 82 ed.; CRC Press; Washington, D.C.; 2001, pp. 12-233-234.*
www.technion.ac.il/technion/material/LibDocs/EngMatLab/Book/23.pdf; pp. 176-182.
Iwakata Yuichi
Kondo Takeshi
Nakata Yasukazu
Senoo Hideo
Berezny Neal
Chaudhuri Olik
Finnegan Henderson Farabow Garrett & Dunner LLP
Lintec Corporation
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