Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1998-09-22
2000-05-02
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438108, 438118, H01L 23495
Patent
active
060571772
ABSTRACT:
A method and apparatus for a reinforced leadframe to substrate attachment in a semiconductor assembly. In one embodiment, a printed circuit board having a plurality of electrically coupled electrical contact regions and wire bond areas formed thereon has a leadframe attached thereto such that each of the bonding fingers of the leadframe is coupled to a respective electrical contact region on the printed circuit board. A ribbon of B-staged epoxy is disposed on the leadframe such that said leadframe is disposed between the ribbon of B-staged epoxy and the printed circuit board. An integrated-circuit die is mounted on the printed circuit board with the bonding fingers of the leadframe peripherally surrounding the integrated circuit die. The bonding pads on the integrated-circuit die are electrically coupled to respective wire bond areas on the printed circuit board. By placing the ribbon of B-staged epoxy over the leadframe, the connection between each bonding finger of the leadframe and the respective electrical contact region is reinforced. Thus, the present claimed invention reduces separation between each bonding finger of the leadframe and the respective electrical contact region of the printed circuit board thereby providing improved reliability and yield in such semiconductor assemblies.
REFERENCES:
patent: 4298769 (1981-11-01), Richman
patent: 5049979 (1991-09-01), Hashemi et al.
patent: 5072283 (1991-12-01), Bolger
patent: 5381039 (1995-01-01), Morrison
patent: 5462624 (1995-10-01), Kwon
patent: 5559369 (1996-09-01), Newman
Dietrich Michael
King Patrick T.
Monin, Jr. Donald L.
VLSI Technology Inc.
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