Regulation of the drain-source voltage of the current-source...

Details Regulation of the drain-source voltage of the current-source... Regulation of the drain-source voltage of the current-source...

2003-04-23

2004-11-02

Sterrett, Jeffrey (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

C323S907000

Reexamination Certificate

active

06812683

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to thermal voltage generators, VBE references (“bandgaps”), and more particularly to bias current regulation within thermal voltage generators.
BACKGROUND OF THE INVENTION
Thermal voltage (VPTAT) generators are used to develop bias currents and are commonly used within bandgap voltage references. VPTAT generators operate by developing a delta_VBE and applying the developed delta_VBE across a resistor. A junction area ratio of 1-to-8 is typically used to develop the delta_VBE. An amplifier is typically used to maintain equal voltages and to establish the delta_VBE across the resistor. When VPTAT generators are implemented using CMOS processes, the junctions are typically formed as vertical substrate PNP junctions and the amplifier is typically implemented using a pair of NMOS devices. The NMOS amplifier input pair uses a current source, which is typically provided by an NMOS current-mirror.
FIG. 1
is a conventional VPTAT generator that is implemented using a CMOS process. The VPTAT generator comprises transistors Q
7
-Q
8
, Ma
1
-Ma
4
, M
3
-M
6
, Mk
3
-Mk
6
, M
11
, Mk
11
, Mm
21
-Mm
22
, M
78
, and resistive device Rtv
1
.
In a VPTAT generator (such as shown in FIG.
1
), the base-emitter voltage (VBE) of the vertical PNP transistors roughly cancels the gate-source voltage (VGS) of the NMOS amplifier. However, the voltage that is used to bias the vertical PNP transistors is raised to a level that is sufficient to accommodate the NMOS current source for the NMOS amplifier. Raising the bias voltage by the full of amount necessary to reach the VGS threshold also raises the minimum voltage (Vdd_min) at which the thermal voltage generator will work. Accordingly, Vdd_min of conventional methods can be expressed as:
Vdd
_min
=VGS
—
m
78+
VBE
—
q
7−
VGS
—
amp+Vdsat
—
amp+VGS
—
pmir
where VGS_amp is the VGS of the amplier input pair. (The body-effect will increase the voltage threshold.) Vdsat_amp is the Vdsat of the NMOS amplifier input pair, and VGS_pmir is the VGS of the PMOS mirrors.
An appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detailed description of illustrated embodiments of the invention, and to the appended claims.


REFERENCES:
patent: 3617859 (1971-11-01), Dobkin et al.
patent: 4587478 (1986-05-01), Kasperkovitz et al.
patent: 4665356 (1987-05-01), Pease
patent: 4879505 (1989-11-01), Barrow et al.
patent: 5920184 (1999-07-01), Kadanka

Affiliated with

Also associated with

Rating

Regulation of the drain-source voltage of the current-source... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Regulation of the drain-source voltage of the current-source..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Regulation of the drain-source voltage of the current-source... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3334223