Regulated switch driving scheme in switched-capacitor...

Amplifiers – With periodic switching input-output

Reexamination Certificate

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C330S051000

Reexamination Certificate

active

07345530

ABSTRACT:
A switched-capacitor amplifier circuit including first and second pairs of sampling capacitors for sampling a pair of input signals includes a voltage regulator coupled to receive a first reference voltage and generate a first regulated output voltage related to the first reference voltage and independent of a first power supply voltage; a clock signal generator generating first and second clock signals referenced to the first power supply voltage and third and fourth clock signals referenced to the first regulated output voltage; and a first set of switches coupling the bottom plates of the sampling capacitors to the amplifier, the first set of switches being controlled by the third and fourth clock signals. The circuit may further include a second set of switches coupling the top plates of the sampling capacitors to the input signals, the second set of switches being controlled by the first and second clock signals.

REFERENCES:
patent: 5739720 (1998-04-01), Lee
patent: 6768374 (2004-07-01), Lee
patent: 7250813 (2007-07-01), Yao
D. Johns et al., “Analog Integrated Circuit Design,” John Wiley & Sons, Inc., 1997, pp. 397-398.
K. Nagaraj et al., “A 250-mW, 8-b, 52-Msamples/s Parallel-Pipelined A/D Converter with Reduced Number of Amplifiers,” IEEE J. Solid State Circuits, vol. 32, No. 3, pp. 312-320, Mar. 1997.
B. Min et al., “A 69-mW 10-bit 80-MSample/s Pipelined CMOS ADC,” IEEE J. Solid State Circuits, vol. 38, No. 12, pp. 2031-2039, Dec. 2003.
M. Dessouky et al., “Very Low-Voltage Digital-Audio ΔΣ Modulator with 88-dB Dynamic Range Using Local Switch Bootstrapping,” IEEE J. Solid State Circuits, vol. 36, pp. 349-355, Mar. 2001.

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