Static information storage and retrieval – Powering
Reexamination Certificate
1996-04-05
2002-04-02
Nguyen, Matthew (Department: 2111)
Static information storage and retrieval
Powering
C363S060000
Reexamination Certificate
active
06366519
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to charge pump or other reference voltage circuitry, and more particularly to integrated circuits such as flash memory devices, which include a charge pump used to generate high voltages on the chip.
2. Description of Related Art
Integrated circuit power supplies are typically specified at 5 volts +/−10%. This supply voltage variation can have a large impact on the amount of current drawn by a circuit on the chip. Reference voltage circuits such as charge pumps are particularly susceptible to this variation in input voltages. The output current generated by a charge pump, and the current drawn by a charge pump may vary substantially as the power supply voltage varies from 4.5 to 5.5 volts.
Flash EEPROM devices are being designed which generate high voltages on chip for use in the erasing or programming cycles for the memory arrays. Some prior art systems rely on not only the 5 volt power supply, but an additional programming power supply of 12 volts which are specified to vary by +/−5%. Newer designs use only the 5 volt supply, and use charge pumps to develop the higher potentials and negative voltages used during the erase and program cycles. The 5 volt supply voltage variations of +/−10% and resulting fluctuations in current produced or drawn, however, can have a large impact on the performance of the erasing and programming cycles. For consistent programming and erase cycles, it is desirable to control the amount of current delivered by such circuits.
Therefore, it is desirable to provide a charge pump circuit with a controlled current consumption, and controlled output current generation, which operates in response to the standard 5 volt only supply.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a reference voltage circuit, like a voltage divider or a charge pump circuit which generates an output voltage at a selected level, but variations in the current supplied to the charge pump are controlled, and variations in the output current generated by the charge pump are controlled.
The input and output currents are controlled by a regulating circuit which is coupled to the 5 volt only power supply. The regulating circuit generates a regulated supply voltage in response to the 5 volt only supply. Thus, the regulated supply voltage varies by less than the 5 volt only supply as the supply voltage varies over the specified range. The charge pump is coupled to the regulating circuit, and generates the output voltage in response to the regulated supply voltage. The variations in the current supplied to and supplied by, the charge pump, according to this circuit, are substantially reduced over an unregulated charge pump.
The regulated supply voltage is generated according to one aspect of the invention by an MOS transistor having its drain coupled to the power supply, and its source supplying the regulated supply voltage. The gate of the transistor is coupled to a reference voltage, which is slightly higher than the supply voltage. The reference voltage in one embodiment is generated by a regulator charge pump on the same integrated circuit as the charge pump being regulated.
According to another aspect of the invention, not only is the driver voltage for the charge pump regulated, but also the clocks used in the charge pump are generated using regulated drivers.
The invention can also be characterized as a flash EEPROM integrated circuit which is coupled to a power supply, such as a 5 volt only system, in which the power supply is specified to vary over +/−10%. This integrated circuit includes a flash EEPROM array, and a read, program and erase controller coupled to the array. A voltage generating circuit supplies a high potential to the array for program or erase operations, depending on the particular charge states of the cells which are selected as the programmed and erased states. The voltage generating circuit includes a regulating circuit, which generates the regulated supply voltage, such that it varies less than the supply voltage as the supply voltage varies over the specified range. Also, a charge pump is coupled to the regulating circuit, which generates a high positive voltage or negative voltage in response to the regulated supply voltage.
According to another aspect, the invention can be characterized as a charge pump circuit which has a controlled output current. This charge pump circuit is coupled to a power supply which has a supply voltage which varies over a specified range. It comprises a first charge pump that generates a reference voltage in response to the supply voltage. A circuit, coupled to the first charge pump and responsive to the reference voltage generates a regulated supply voltage. The second charge pump generates a controlled output voltage in response to the regulated supply voltage. This second charge pump produces an output current and variations in the output current generated by the second charge pump are limited by the regulated supply voltage.
Other aspects and advantages of the present invention can be seen upon review of the figures, the detailed description, and the claims which follow.
REFERENCES:
patent: 5258662 (1993-11-01), Skovmand
patent: 5394027 (1995-02-01), Park
patent: 5414669 (1995-05-01), Tedrow et al.
patent: 5422586 (1995-06-01), Tedrow et al.
patent: 5455794 (1995-10-01), Javanifard et al.
patent: 5553030 (1996-09-01), Tedrow et al.
patent: 5675279 (1997-10-01), Fujimoto et al.
patent: 1-290195 (1989-11-01), None
patent: 1-307097 (1989-12-01), None
patent: 4-268294 (1992-09-01), None
patent: 6-259979 (1994-09-01), None
patent: 6-311732 (1994-11-01), None
Hung Chun-Hsiung
Lin Tien-Ler
Matsubara Satoshi
Soejima Kota
Haynes Mark A.
Haynes Beffel & Wolfeld LLP
Macronix International Co. Ltd.
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