Regulated MOS substrate bias voltage generator for a static rand

Details Regulated MOS substrate bias voltage generator for a static rand Regulated MOS substrate bias voltage generator for a static rand

1980-11-03

1982-03-30

Shoop, William M.

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

323274, 307297, 307304, 307200B, H03L 100, H03K 3353

Patent

active

043226752

ABSTRACT:
A regulated substrate bias voltage generating system for maintaining a minimum data retaining current through an associated MOS memory. The negative substrate bias voltage is generated by a charge pump operating under the control of a two-phased output oscillator, the operation of which is enabled and disabled by the output signals from a MOS memory over-current sensor, a MOS memory under-current sensor, and a bias voltage level sensor.

REFERENCES:
patent: 3794862 (1974-02-01), Jenne
patent: 3806741 (1974-04-01), Smith
patent: 4049980 (1977-09-01), Maitland
patent: 4115710 (1978-09-01), Lou
patent: 4142114 (1979-02-01), Green
patent: 4229667 (1980-10-01), Heimbigner et al.

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