Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-05-17
2004-01-27
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S1540PB
Reexamination Certificate
active
06683469
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system and method of testing an integrated circuit (IC) for signal noise, and especially to a regulable test IC system for signal noise and method of using the same.
2. Description of Related Art
The top operating frequency of a digital IC (e.g., an Intel CPU) has increased from 500 MHz to 1000 MHz. With increasingly integrated systems and faster operating frequency, the performance requirement of a CPU is becoming even stricter. However, a higher operating frequency can result in problems resulting from electrical noise. Therefore, from the viewpoint of electrical analysis, noise detection and measurement of integrated circuit package (IC package), connector, and printed circuit board substrate (PCB substrate) for noised incurred as a result of increased CPU operating frequency are necessary. For example, test reflection noise from Impedance Mis-Match, cross-talk from many parallel lines, and switching noise from logic gates transited concurrently exert an influence on a variety of IC packages/connectors/PCBs during operation. The design of Shrink Small Outline Package (SSOP), Plastic Quad Flat Package (PQFP), Plastic Ball Grid Array (PBGA), Chip Size Package (CSP), Flip chip, Build-up, and Built-in for high frequency response must take into account the influence of noise on the associated executable highest frequency response.
Typically, this problem is solved using a 2D/3D software simulation analysis for evaluation. However, the use of algorithms and the high operating frequency limit the effectiveness of 2D/3D software simulation analysis, and it lacks the flexibility to cope with the changed environment and the interactive relation of circuits. For example, software simulation can calculate the values of parts of a 3D structure such as LCR (i.e. inductance, capacitance, and resistance) values of a wire bond. However, software simulation can not appropriately calculate the required values for a 3D structure includes a structure greater than two discontinuous geometries. More, when a bus's operating frequency is over 133 MHz or an IC's operating frequency is over 1000 MHz, the demand of accuracy is stricter, further limiting the usefulness of software simulation. As a result, software simulation can not achieve the accuracy demanded from a noise limit requirement.
SUMMARY OF THE INVENTION
Accordingly, an object of the invention is to provide a test system and method of using it in the form of hardware, for directly testing the response of a noise on a variety of package designs, connectors, and PCB substrates.
Another object of the invention is to provide a regulable test system and method for testing the noise of a digital signal on a package, even in a 3D environment.
The invention provides a regulable test IC system for signal noise on the electrical analysis point. The regulable test IC system comprises: a power supply, for providing a test voltage in the system; a pulse generator, for providing a test frequency in a noise testing of the system; a regulable test IC with different signal pads capable of regulable testing signal noise with the test frequency from the pulse generator and the test voltage from the power supply in a plurality of built-in specific structures, under the basis of an assigned current standard; a digital detection device with a display, for displaying and recording the result of the regulable test.
The invention also provides a method of performing in the regulable test IC for signal noise test. The method comprises the steps: connecting a target to be tested to the regulable test IC according to an assigned signal ratio (total signal pins to Quiet signal pins); setting a test voltage on a power supply and a test frequency on a pulse generator; choosing a current standard; using a digital detection device with a display to test signal noise of the target to be tested with the test frequency and the test voltage in a plurality of built-in specific structures, under the chosen current standard; displaying and recording the resulting value.
The invention overcomes the limitations of software analysis in the form of hardware. The present invention allows the analysis of the noise situation from the real-time display of the digital detection device. Using the real-time display, an IC factory can analyze the resulting data and obtain the high-frequency response of a variety of IC packages/connectors/PCBs and the executable highest response. Accordingly, the factory can obtain optimized high-frequency electrical designs of an IC package and miniature packing designs, thereby avoiding cost waste from error selection and over design typical with software analysis.
REFERENCES:
patent: 3778704 (1973-12-01), Lubarsky, Jr. et al.
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patent: 5166625 (1992-11-01), Guiga et al.
patent: 6043662 (2000-03-01), Alers et al.
patent: 6114858 (2000-09-01), Kasten
Lee Min-Lin
Shyu Chin-Sun
Birch & Stewart Kolasch & Birch, LLP
Cuneo Kamand
Industrial Technology Research Institute
Nguyen Jimmy
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