Active solid-state devices (e.g. – transistors – solid-state diode – Miscellaneous
Reexamination Certificate
2000-01-27
2001-11-27
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Miscellaneous
C257S797000
Reexamination Certificate
active
06323560
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to exposure technique and, more specifically, to an improvement of exposure technique taking into consideration the influence of aberration.
2. Description of the Background Art
Recently, elements constituting a semiconductor device, which is formed of a plurality of layers, come to be smaller and smaller. Therefore, registration accuracy of the elements formed in various layers of the semiconductor device comes to be more important. In addition, as the element has been miniaturized, influence to exposure caused by aberration of the optical system becomes significant.
The aforementioned registration accuracy is related to the following factors of errors.
(i) registration error: registration error in general meaning;
(ii) alignment error: errors in X, Y and &thgr; directions in aligned chip;
(iii) machine stability and compatibility error: error inherent to the aligner itself;
(iv) mask error: error in pattern location from ideal point of each coordinate point of the mask;
(v) mask thermal expansion error: registration error derived from thermal expansion of the mask in the aligner;
(vi) residual error: error caused by bending when the mask or the wafer is fixed, non linear distortion at high temperature heat treatment of the wafer and so on.
Of the various factors of registration error mentioned above, here, (i) registration error will be described.
First, referring to the figures, registration error measurement mark for measuring the registration error will be described, taking an MOS transistor as an example.
FIG. 54
is a vertical section of a general MOS transistor, and
FIG. 55
is a plane view of a semiconductor device including the MOS transistor.
Referring to these figures, the structure of the MOS transistor will be briefly described. First, on a semiconductor substrate
76
, a word line
80
A constituting a gate electrode is formed, with a gate oxide film
78
interposed. Source/drain regions
77
are formed in semiconductor substrate
76
.
Above gate electrode
80
A, a bit line
82
A is formed, with an interlayer oxide film
80
interposed. Bit line
82
A is electrically connected to one of source/drain region
77
. Word line
80
A and bit line
82
A are arranged orthogonally crossing each other as shown in FIG.
55
. An interlayer oxide film
83
is formed on bit line
82
A.
Referring to
FIG. 55
, assume that in the semiconductor device having the above-described structure, a contact hole
74
is formed in an active region
85
between word lines
80
A and bit lines
82
A which word lines and bit lines are arranged apart by 1 &mgr;m from each other. The line width of word line
80
A and the line width of bit line
82
A are both 0.4 &mgr;m.
The size of the contact hole
74
opened in the semiconductor device is 0.5 &mgr;m×0.5 &mgr;m. Therefore, when word lines
80
A and bit lines
82
A and contact hole
74
are formed registered exactly as designed, the distance X in the X direction between word line
80
A and contact hole
74
and the distance Y in Y direction between bit line
82
A and contact hole
74
would be both 0.25 &mgr;m.
However, contact hole
74
may be opened out of position because of registration error. In that case, it is possible that part of the contact hole
74
is opened in word line
80
A or bit line
82
A.
Here, contact hole
74
is opened by the following manner. First, as shown in
FIG. 54
, a resist film
84
A formed on interlayer oxide film
83
is patterned by photolithography, and using the patterned resist film
84
A, the contact hole is opened.
Therefore, after the resist film
84
A is patterned, deviation between the position of the pattern for the contact hole formed in resist film
84
A and the positions of word lines
80
A and bit lines
82
A is measured, and if the contact hole pattern of the resist film is not accurate, only the resist film
84
A have to be formed again.
However, the space between the contact hole
74
and word line
80
A or between contact hole
74
and bit line
82
A is as small as 0.25 &mgr;m, and therefore it is difficult to measure registration error in this region.
Therefore, a method has been proposed in which a registration error measurement mark as a dummy pattern for measuring registration error is formed in a peripheral region around a semiconductor forming region simultaneously with the formation of the resist film, the word line and the bit line, and by measuring registration error of the measurement mark, registration error between the contact hole pattern of the resist film and the word lines and bit lines is measured.
The registration error measurement mark will be described with reference to
FIGS. 56 and 57
. First, referring to
FIG. 56
, arrangement of the registration error measurement mark will be described. In a peripheral region of the semiconductor device, a first measurement mask
80
B is formed at a prescribed position simultaneously with word line
80
A on gate oxide film
78
.
Planar shape of the first measurement mark
80
B is a square of 25 &mgr;m×25 &mgr;m as shown in FIG.
24
A. Further, a second measurement mark
82
B is formed at a prescribed position of interlayer oxide film
80
, simultaneously with bit line
82
A. The planar shape of second measurement mark
82
B is also a square of 25 &mgr;m×25 &mgr;m, similar to the first measurement mark
80
B of FIG.
57
.
Above the first measurement mark
80
B and the second measurement mark
82
B on interlayer insulating film
83
, third and fourth measurement marks
84
B and
84
C are formed simultaneously with the patterning of the resist film.
The size of the third and fourth measurement marks
84
B and
84
C is 15 &mgr;m×15 &mgr;m as shown in FIG.
57
(
a
).
The first to fourth measurement marks
80
B,
82
B,
84
B and
84
C are adapted to have square planar shape, in order to meet the requirement of a measurement inspecting apparatus (for example, KLA5011 manufactured by KLA), allowing recognition of the positions of the sides of the square. The length of one side of the mark is required to be 15 to 30 &mgr;m for the first and second measurement marks and 7.5 to 15 &mgr;m for the third and fourth measurement marks. By the present technique, it is impossible to inspect registration of smaller dimensions.
Referring to
FIG. 57
, measurement of registration error between the word line
80
A and the contact hole pattern of the resist film using the first and the third measurement marks
80
B and
84
B will be described.
FIG.
57
(
a
) is a plane view from above of the third measurement mark
84
B. FIG.
57
(
b
) is a cross section taken along the line LVII(
a
)—LVII(
a
) of FIG.
57
(
a
). FIG.
57
(
c
) shows brightness of detection signal corresponding to the cross section taken along the line LVII(
a
)—LVII(
a
) of FIG.
57
(
a
).
As can be seen from the figure, at the positions of side walls
10
a
,
10
b
,
11
a
and
11
b
of the first and third measurement marks
80
B and
84
B, the detection signal becomes dark. Here, by using the detection signal, registration error between word line
80
A and the contact hole pattern of the resist film is measured.
For example, the center between the detection signals corresponding to the side walls
10
a
and
10
b
is found and the center c
2
of the detection signals corresponding to side walls
11
a
and
11
b
is found. When the positions of the centers c
1
and c
2
coincide with each other, the deviation between the first and third measurement marks
80
B and
84
B is zero. When the positions of centers c
1
and c
2
do not coincide with each other, the difference therebetween corresponds to the amount of deviation between the first and third measurement marks
80
B and
84
B. This amount of deviation is in one to one correspondence with the amount of deviation between word line
80
A and the contact hole pattern of the resist film, and hence it can be directly regarded as registration error.
The amount of deviation between the second and fourth measurement marks
82
B and
84
C
Hachisuka Atsushi
Minamide Ayumi
Miyamoto Yuki
Narimatsu Koichiro
Saito Takayuki
Crane Sara
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Tran Thien F.
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