Register stacking in a computer system

Details Register stacking in a computer system Register stacking in a computer system

1994-08-17

1997-06-17

Black, Thomas G.

Boots, shoes, and leggings

364DIG1, 364DIG2, 395378, 395569, G06F 900

Patent

active

056405820

ABSTRACT:
A computer system provides an expanded register set by employing transparent register stacks for each general purpose register. Each general purpose register and its corresponding set of auxiliary registers form a register stack. No register identification bits are required in processor instructions to reference auxiliary registers. A register set select storage area is a programmable register provided for the storage of a value that identifies the currently active register level. The register set select storage area is loaded using two additional processor instructions provided as part of the present invention. A register set switch is used for selecting a data path to the register level specified by the register set select storage area. A PUSHREG instruction is used to push the register stack pointer down one level. A POPREG instruction is used to move the register stack pointer up one register level. In a alternative embodiment of the present invention, the POPREG and PUSHREG instructions include an argument that specifies the single register stack that is manipulated. In another embodiment of the present invention, register stack underflow or overflow conditions are trapped using an interrupt process. Task switching is implemented with the present invention using a plurality of register stacks each associated with a task frame. In another embodiment of the present invention, the semantics of interrupts to the processor are changed to include an automatic PUSHREG and POPREG instruction execution.

REFERENCES:
patent: 4459657 (1984-07-01), Murao
patent: 4530049 (1985-07-01), Zee
patent: 4833640 (1989-05-01), Baba
patent: 4942524 (1990-07-01), Nunomura
patent: 4969091 (1990-11-01), Muller
patent: 5050067 (1991-09-01), McLagan et al.
patent: 5070451 (1991-12-01), Moore et al.
patent: 5093783 (1992-03-01), Kitada
patent: 5155853 (1992-10-01), Mitsuhira et al.
patent: 5214786 (1993-05-01), Watanabe et al.
patent: 5226142 (1993-07-01), Vegesna et al.
patent: 5293594 (1994-03-01), Nojiri et al.
patent: 5319757 (1994-06-01), Moore et al.
patent: 5517664 (1996-05-01), Watanabe et al.
patent: 5560035 (1996-09-01), Garg et al.

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