Register file with multi-tasking support

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Details

3954211, 395676, G06F 942

Patent

active

056551320

ABSTRACT:
A register file connected to a data memory and an arithmetic logic unit for temporary storage of operands, and a method of managing such register file permits the register file to be used to maximum efficiency, and permits rapid task and context switching. Each register of the register file has an absolute address. A relative register address is read from the address field of the instruction being executed by the ALU, and an arithmetic calculation is performed on that relative register address and a register base address to obtain an absolute register address of the register to be accessed. Different sets of registers may be designated for different tasks or contexts. Each set of registers has its own base address. Once the task or context to which the instruction applies is determined, a calculation using the relative address from the instruction address field, and the corresponding register set base address may be performed to obtain the absolute address of the register to be accessed. Registers assigned to a different task or context may be virtually immediately accessed, or a set of registers for a particular task or context may be moved within the register file without affecting the instructions being executed by the ALU, by simply changing the base address used in the address computation.

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