Register circuit in which a stop current may be measured

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307279, 307290, H03K 3356, H03K 1722

Patent

active

052124100

ABSTRACT:
An output terminal of a register circuit in an LSI circuit such as a microcomputer, etc. is set to be a set state and is reset to be a reset state in accordance with set and reset signals and a clock-stop signal which is generated at a stop mode. A stop current is measured to flow between a predetermined node of the register circuit at the set state, and between the predetermined node and a power supply at the reset state.

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