Register circuit for transmitting and receiving serial data

Details Register circuit for transmitting and receiving serial data Register circuit for transmitting and receiving serial data

1985-06-06

1987-03-03

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

377 54, 328104, 328105, G11C 1900

Patent

active

046481052

ABSTRACT:
A register circuit for serial transmission or reception of digital data in a microprocessor controlled system is provided. A first plurality of rank ordered latches is provided to receive in parallel data to be transmitted. A second plurality of rank ordered latches is provided wherein each of the second plurality of latches except the highest ranked latch interconnects the first plurality of latches. The first and second plurality of latches function together to serially clock output data to be transmitted. The two pluralities of latches form a single register circuit which also serially receives data and latches the received data in response to a control circuit implemented as a "walking one" register. After the serially received data is latched, the data is provided for use by the microprocessor controlled system in parallel output form.

REFERENCES:
patent: 3167738 (1965-01-01), Westerfield
patent: 3281700 (1966-10-01), Young
patent: 4034156 (1977-04-01), Willmore

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