Reflective surface for CVD reactor walls

Coating processes – With pretreatment of the base – Etching – swelling – or dissolving out part of the base

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C427S184000, C205S206000, C205S208000

Reexamination Certificate

active

06319556

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the manufacture of chemical vapor deposition reactors and, more particularly, to reflective surfaces within such reactors.
2. Description of the Related Art
Chemical vapor deposition (CVD) is a very well known process in the semiconductor industry for forming thin films of materials on wafers. In a CVD process, gaseous molecules of the material to be deposited are supplied to wafers to form a thin film of that material on wafers by chemical reaction. Such formed thin films may be polycrystalline, amorphous or epitaxial. Typically, CVD processes are conducted at elevated temperatures, to accelerate the chemical reaction and produce high quality films.
In the semiconductor industry, it is important that the material be deposited uniformly thick with uniform properties over the wafer. In Very Large and Ultra Large Scale Integrated Circuit (VLSI and ULSI) technologies, the wafer is divided into individual chips having integrated circuits thereon. If a CVD process step produces deposited layers with nonuniformities, devices at different areas on the chips may have inconsistent operation characteristics, or may fail altogether.
One of the most important factors in achieving uniformly thick and high quality thin films is the uniformity of temperature within the chamber, and particularly of the temperature across the semiconductor wafers (or other deposition substrates). Substrates can be heated using resistance heating, induction heating or radiant heating. Among these, radiant heating is the most efficient technique and hence is currently the favored method of supplying energy to a CVD chamber.
Significantly, radiant heating results in short processing times and greater throughput. Radiant heating directly heats the wafer during the CVD process. The temperature of the wafers can be ramped up to the desired process temperature, and ramped down to a satisfactory handling temperature, faster than with alternative heating techniques. Additionally, radiant heating can be controlled to maintain the wafer at the desired temperature for a sufficient time to accomplish the process step. Radiant heating energy can be supplied, for example, by banks of quartz halogen lamps above and below the reaction chamber.
Unfortunately, radiant energy has a tendency to create nonuniform temperature distributions, including “hot spots,” due to the use of localized sources and the consequent focusing and interference effects.
In an effort to provide more uniform illumination and resulting uniform temperature distribution across the wafers, the industry practice has been to mount reflectors behind the lamps to indirectly illuminate the wafers. These reflectors are generally made of a base metal and often are gold plated to increase their reflectivity. Planar reflecting surfaces, however, still tend to induce hot spots on wafers being heated.
Accordingly, a need exists for a system for achieving uniform temperature distributions across semiconductor wafers during processing. Desirably, such a system should maintain the advantages of radiant heating.
SUMMARY OF THE INVENTION
The present invention provides a reflecting surface and method of manufacturing the same. The surface has a relatively smooth texture, and yet is sufficiently irregular to scatter radiant heat energy. The reflector thus aids in uniformly heating substrates to be processed while simultaneously presenting an easy-to-clean surface texture. Reactor down time for cleaning is thereby reduced. Additionally, because the reflecting surface can be kept relatively clean, the lifespan of the reflector is lengthened.
In accordance with one aspect of the present invention, a reflector plate is provided for scattering radiant energy in a high temperature reactor. The reflector includes a base plate with a reflecting surface. A plurality of depressions is formed in the reflecting surface. The average ratio of width to depth for the depressions across the reflector plate averages greater than about 3:1. The reflecting surface includes a metallic specular finish conforming to the depressions.
In accordance with another aspect of the invention, a cold wall semiconductor processing reactor is provided. The reactor includes a reaction chamber with at least one window which is transparent to radiant energy. A radiation source is positioned outside of the reaction chamber. A reflector is also positioned outside the chamber, such that the radiation source is interposed between the reflector and the window of the reaction chamber. The reflector has a specular reflecting surface facing the reaction chamber. This reflecting surface includes a plurality of adjoining depressions with substantially no planar surfaces within the depressions.
In accordance with still another aspect of the invention, a method is provided for manufacturing a reflector for scattering radiant energy in a high temperature reactor. A base plate is provided with a substantially planar surface. Material is then removed from the planar surface of the base plate to produce an irregular surface. The irregular surface is provided with a specular finish.
In accordance with still another aspect of the invention, a method of manufacturing a reflector for scattering radiant energy is provided. The method includes providing a base plate with a substantially planar surface. Material is removed from substantially all of planar surface of the base plate to produce a non-planar surface. The non-planar surface is provided with a specular finish.
In accordance with still another aspect of the invention, a method of manufacturing a reflector for scattering radiant energy in a high temperature reactor is provided. A base plate is provided with a substantially planar surface. A plurality of depressions is formed in the base plate. Each of the depressions has a depth into the base plate and a width in a dimension perpendicular to the depth. The ratio of width to depth for the depressions across the reflector plate averages greater than about 3:1. The depressions are provided with a specular finish.
In accordance with still another aspect of the invention, a reflector is provided for scattering radiant energy in a high temperature process reactor. The reflector has a specular reflecting surface which includes a plurality of adjoining depressions. The depressions are arranged with substantially no planar surfaces among or within the depressions.


REFERENCES:
patent: 4106859 (1978-08-01), Doriguzzi et al.
patent: 4425604 (1984-01-01), Imai et al.
patent: 4755654 (1988-07-01), Crowley et al.
patent: 4789771 (1988-12-01), Robinson et al.
patent: 4839522 (1989-06-01), Bourgeois et al.
patent: 4863757 (1989-09-01), Durand
patent: 4912613 (1990-03-01), Sanborn
patent: 4975561 (1990-12-01), Robinson et al.
patent: 5053247 (1991-10-01), Moore
patent: 5156820 (1992-10-01), Wong et al.
patent: 5243620 (1993-09-01), Wisotzki
patent: 5531835 (1996-07-01), Fodor et al.
patent: 5628564 (1997-05-01), Nenyei et al.
patent: 29620783 (1997-07-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Reflective surface for CVD reactor walls does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reflective surface for CVD reactor walls, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reflective surface for CVD reactor walls will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2616484

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.