Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2000-12-22
2004-11-30
Chaki, Kakali (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S209000, C708S313000, C708S402000
Reexamination Certificate
active
06826584
ABSTRACT:
FIELD OF INVENTION
The invention is related to the field of signal reconstruction.
BACKGROUND OF THE INVENTION
In the field of signal compression, a signal is frequently decimated to a prescribed size and format prior to applying the compression standard. For example, the H.261 Standard is used in video conference systems that interface with a 484 line interlaced display, but the luminance channel input is assumed to be progressive scan data of size either 144 rows of 176 pixels or 288 rows of 352 pixels. A typical video coding system must first decimate the larger input image down to the size expected by the video coder and then the typical decoding equipment must reverse this operation for the display. Similar techniques are employed in systems based on the H.263, MPEG-1, MPEG-2, and other coding systems.
SUMMARY OF THE INVENTION
A method including decimating a signal x using a filter f to obtain a decimated signal y, interpolating the decimated signal y to obtain a reconstructed signal z, determining a refinement factor s by decimating z and comparing decimated z to the decimated signal y, and determining an improved reconstructed signal r by using the refinement factor s, the filter f, and the reconstructed signal z is disclosed.
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Carrig James J.
Paniconi Marco
Blakely , Sokoloff, Taylor & Zafman LLP
Chaki Kakali
Do Chat
Sony Corporation
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