Reference-voltage generating circuit

Details Reference-voltage generating circuit Reference-voltage generating circuit

1999-10-06

2000-07-11

Nguyen, Matthew

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

G05F 316

Patent

active

060878215

ABSTRACT:
Saturation connection is performed between the gate and source of a depletion-type n-channel MOS transistor, and the depletion-type n-channel MOS transistor generates a first constant current. A current-mirror circuit is connected to the depletion-type n-channel MOS transistor, and mirrors the first constant current. A first enhancement-type n-channel MOS transistor generates a first constant voltage which depends on the first constant current, when receiving the first constant current mirrored by the current-mirror circuit and being activated. A first resistance element is connected between the first enhancement-type n-channel MOS transistor and ground. A second enhancement-type n-channel MOS transistor is connected to the first enhancement-type n-channel MOS transistor and the first resistance element, and controls generation of a second constant current in the first resistance element in accordance with activation of the first enhancement-type n-channel MOS transistor. A second resistance element is connected between a power-supply line and the second enhancement-type n-channel MOS transistor, and generates a second constant voltage which depends on the second constant current.

REFERENCES:
patent: 4399375 (1983-08-01), Sempel
patent: 4654578 (1987-03-01), Salerno et al.
patent: 5300822 (1994-04-01), Sugahara et al.
patent: 5514948 (1983-08-01), Okazaki
patent: 5948991 (1996-03-01), Tanoi

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