Reference voltage circuit

Details Reference voltage circuit Reference voltage circuit

2000-04-17

2001-04-10

Berhane, Adolf Deneke (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

C323S314000

Reexamination Certificate

active

06215291

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to battery charging systems, and in particular, to a control system for reducing total charging time by maximizing the time high current flows across a secondary battery being charged.
2. Discussion of the Related Art
In a battery charging system for a lithium-ion or lead acid battery, a constant current (CC) mode of operation applies a high current across the discharged battery to provide rapid charging. When the battery reaches a final termination voltage, the battery charging system switches to a constant voltage (CV) mode of operation to maintain the battery at its termination voltage level. CC charging cannot be applied to the battery once it reaches its termination voltage since the energy storage capacity of the battery would be exceeded, leading to battery and charging system damage. However, in order to minimize overall charging cycle time, the CC charging time must be maximized. Therefore, the sharpness of the transition between the two modes of operation is a crucial factor in the productivity of the battery charging system. In a conventional battery charging system, the CC and CV control loops are based on a control circuit including three amplifier stages.
FIG. 1
depicts a conventional battery charging circuit
100
. Referring to
FIG. 1
, a control circuit
190
includes a CC amplifier
105
and a CV amplifier
106
that control the output of an output amplifier
108
. During CC mode operation, a charging current Ibatt flowing through a battery
102
being recharged is measured by a current detector
103
. CC amplifier
105
monitors the output of current detector
103
and signals output amplifier
108
to control an output voltage Vout of a power source
101
to maintain current Ibatt at a high rapid-charging current Imax. Meanwhile, CV amplifier
106
monitors the voltage across battery
102
as measured by a voltage detector
104
. When the voltage across battery
102
reaches a final termination voltage Vfinal, CV amplifier 106 assumes control of output amplifier
108
and maintains voltage Vfinal across battery
102
. One example of current detector
103
is shown in
FIG. 3
a
. A current sense resistor
301
placed in series with battery
102
generates a voltage Vdc proportional to current Ibatt. In
FIG. 3
b
, one example of voltage detector
104
includes a differential amplifier
302
that generates a voltage Vbatt which varies with the difference between voltages Vout and Vcs. Returning to
FIG. 1
, a voltage Vs at the non-inverting terminal and a reference voltage Vref at the inverting terminal of output amplifier
108
generate a control voltage Vc that regulates voltage Vout from power source
101
. Voltage Vs is provided by summing the output currents of CC amplifier
105
and CV amplifier
106
. An example of CC amplifier
105
shown in
FIG. 2
a
includes an error amplifier
201
that compares voltage Vdc to a reference voltage Vrapid. Voltage Vrapid is defined by the following equation:
Vrapid=Imax*R301
where R
301
is the resistance of current sense resistor
301
of
FIG. 3
a
. At the same time, an example of CV amplifier
106
includes an error amplifier
202
to compare voltage Vbatt to final termination voltage Vfinal. Output contentions at error amplifiers
201
and
202
are prevented by diodes
203
and
204
. A resistor
112
sums the current output of amplifiers
105
and
106
to provide the voltage Vs. While battery voltage Vbatt is less than voltage Vfinal, CV amplifier
106
provides a high impedance output. Therefore, error amplifier
201
is able to adjust voltage Vs as necessary to maintain voltage Vdc equal to voltage Vrapid and keep rapid-charging current Imax flowing though battery
102
. However, when battery voltage Vbatt reaches voltage Vfinal, amplifier
202
rises from its low saturated state to maintain voltage Vfinal across battery
102
. At the same time, current Ibatt is reduced, lowering voltage Vdc and switching CC amplifier
105
to a high impedance output. CV mode operation is then maintained by CV amplifier
106
until the fully-charged battery is replaced by a discharged battery. In this manner, battery
102
is provided with current Imax during CC mode operation and is maintained at voltage Vfinal during CV mode operation.
An alternative implementation of CC amplifier
105
and CV amplifier
106
is shown in
FIG. 2
b
. Unidirectional transconductance error amplifiers
205
and
206
replace error amplifiers
201
and
202
, respectively. Because amplifiers
205
and
206
are unidirectional, blocking diodes to prevent output contentions between the two amplifiers are not required. A pulldown resistor
112
converts the current outputs of amplifiers
205
and
206
into signal voltage Vs at summing node N
1
. While voltage Vbatt is less than voltage Vfinal, amplifier
206
sources no current into node N
1
. Therefore, the current provided by amplifier
205
controls the value of signal voltage Vs, and rapid charging current Imax flows through battery
102
. Then, when voltage Vbatt reaches voltage Vfinal, the current from amplifier
206
drives voltage Vs to a level required for CV mode operation. A step-down resistor
111
at the output terminal of amplifier
205
ensures that amplifier
206
dominates the value of voltage Vs when voltage Vbatt reaches voltage Vfinal. Once again, CV mode operation is then maintained by CV amplifier
106
until fully-charged battery
102
is replaced by a discharged battery.
CC amplifier
105
, CV amplifier
106
, and output amplifier
108
are critical in determining the sharpness of the transition between CC and CV modes of operation. For the purpose of illustrating the effects to be discussed below, a battery can be modeled by a capacitor coupled in series with a resistor of resistance Resr (“esr” stands for “effective series resistance”). For our purpose, resistance Resr can be assumed substantially constant throughout the charging process. This battery model is illustrated in
FIG. 3
d.
FIG. 6
, consisting of
FIGS. 6
a
-
6
e
, illustrates the voltage profiles of a conventional battery charging circuit and of an ideal charging circuit during a typical battery charging cycle.
FIG. 6
a
depicts the battery low-side voltage Vdc. Vdc also represents the voltage across current detector
103
in
FIG. 1
or the voltage across current sense resistor
301
in
FIG. 3
a
when the implementation of a current detector shown is used. The battery charging current Ibatt is proportional to voltage Vdc and can be derived from the Vdc curve using the following equation:
Ibatt=Vdc/R
103
where R
103
is the resistance of current detector
103
. Note that R
103
equals R
301
when current sense resistor
301
is used as the current detector circuit.
FIG. 6
b
illustrates the battery voltage Vbatt.
FIG. 6
c
illustrates the voltage Vcharge which is the resistance free voltage of the battery (i.e. the voltage across the capacitor in the battery model of
FIG. 3
d
). In
FIGS. 6
a
-e, charging of battery
102
commences at time T
0
.
Curves
602
,
622
, and
642
, shown as dotted lines in
FIGS. 6
a-c
, depict qualitatively the effects of a gradual transition between the CC and CV modes of operation. In comparison, curves
601
,
621
, and
641
, shown as solid gray lines in
FIGS. 6
a-c
, depict the ideal voltage characteristics of a battery charging circuit which minimizes the overall charging cycle time. Curve
621
(voltage Vbatt_ideal) represents the ideal battery voltage measured across the terminals of battery
102
. When charging begins at time T
0
, Vbatt_ideal is substantially the product of the ideal charging current Ibatt_ideal and the effective series resistance Resr, assuming no residual energy is stored in battery
102
at time T
0
(Ibatt_ideal is derived from voltage Vdc_ideal of curve
601
in
FIG. 6
a
). As shown in
FIG. 6
b
, at time T
0
, Vbatt_ideal is at a value of Vesr. Vbatt_ideal (curve
621
) rises from this initial voltage to reach the final termination volta

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