Reference signal generator circuit with filter-less...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals

Reexamination Certificate

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Details

C327S361000, C455S326000

Reexamination Certificate

active

08040173

ABSTRACT:
A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees.

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patent: 7130599 (2006-10-01), Persico et al.
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patent: 7519349 (2009-04-01), Sridharan
patent: 2003/0220086 (2003-11-01), Birkett
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patent: 2004-536471 (2004-12-01), None
patent: 2007-295068 (2007-11-01), None
Geum-Young Tak et al., “A 6.3-9-GHz CMOS Fast Settling PLL for MB-OFDM UWB Applications”, IEEE Journal of Solid-state Circuits, vol. 40, No. 8, pp. 1671-1679, Aug. 2005.

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