Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Patent
1999-04-30
2000-10-24
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
327 55, 327 57, 330261, H03F 345
Patent
active
061373192
ABSTRACT:
In some embodiments, the invention includes a reference-free single ended sense amplifier. The sense amplifier includes first and second transistors in a differential pair, the first transistor having a control terminal connected to an input conductor to receive an intermediate signal, the first transistor having a data terminal connected to a node, and the second transistor having a control terminal coupled to the node. The sense amplifier further includes a cross-coupled inverter latch having a first inverter coupled to the first transistor through the node and a second inverter coupled to the second transistor. In some embodiments, the control terminal of the second transistor is tied to the node. The first and second transistors of the differential pair may be pFET transistors or nFET transistors or a combination of them. In some embodiments, the sense amplifier is includes as a part of a domino logic gate. Other embodiments are described and claimed.
REFERENCES:
patent: 4616148 (1986-10-01), Ochii et al.
patent: 4885479 (1989-12-01), Oritani
patent: 5034623 (1991-07-01), McAdams
patent: 5086427 (1992-02-01), Whittaker et al.
patent: 5461338 (1995-10-01), Hirayama et al.
patent: 5483181 (1996-01-01), D'Souza
patent: 5559461 (1996-09-01), Yamashina et al.
patent: 5568062 (1996-10-01), Kaplinsky
patent: 5594361 (1997-01-01), Campbell
patent: 5644255 (1997-07-01), Taylor
patent: 5814899 (1998-09-01), Okumura
patent: 5852373 (1998-12-01), Chu et al.
patent: 5892372 (1999-04-01), Ciraula et al.
patent: 5986473 (1999-11-01), Krishnamurthy et al.
patent: 5994918 (1999-11-01), Mehra
patent: 6002292 (1999-12-01), Allen et al.
P. Larsson et al., "Noise in Digital Dynamic CMOS Circuits," IEE Journal of Solid-State Circuits, vol. 29, No. 6, Jun. 1994, pp. 655-662.
K. Shepard et al., "Noise in Deep Submicron Digital Design," ICCAD '96, pp. 524-531, 1996.
S. Shigematsu et al., "A 1-V High-Speed MTCMOS Circuit Scheme for Power-Down Application Circuits," IEEE Journal of Solid-State Circuits, vol. 32, No. 6, Jun. 1997, pp. 861-869.
Z. Wang et al., "Fast Adders Using Enhanced Multiple-Output Domino Logic," IEEE Journal of Solid-State Circuits, vol. 32, No. 2, Feb. 1997, pp. 206-214.
Y. Nakagome et al., Sub-1-V Swing Internal Bus Architecture for Future Low-Power ULSI's IEEE Journal of Solid-State Circuits, vol. 28, No. 4, Apr. 1993, pp. 414-419.
H. Zhang et al., "Low-Swing Interconnect Interface Circuits," Proceedings of Int'l Symp. On Low Power Electronics and Design, Aug. 10, 1998, pp. 161-166.
N. Weste et al., "Principles of CMOS VLSI Design" (Addison-Wesley 2nd Edition, 1993). pp. 308-311.
T. Sakurai et al., "Low-Power CMOS Design through Vth Control and Low-Swing Circuits" Proceedings of Int'l Symp. On Low Power Electronics and Design, Aug. 18, 1997, pp. 1-6.
Alvandpour Atila
Krishnamurthy Ram K.
Spotten Reed D.
Aldous Alan K.
Callahan Timothy P.
Intel Corporation
Luu An T.
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